Abstract:
A system (10) for managing a reference clock signal includes an XO (22), a signal buffer (24) coupled to the XO (22) and configured to drive a reference clock signal generated by the XO (22), and a first IC (12) coupled to the signal buffer (24). The first IC (12) includes an XO input buffer (32) configured to receive the reference clock signal, to switch between an enabled, operational state and a disabled state, and to have a first operational impedance while in the enabled state; an impedance equivalence circuit (34) configured to be in an enabled, operational state when the XO input buffer (32) is in its disabled state and vice versa and to have a second operational impedance while in the enabled state that is equivalent to the first operational impedance; and a control mechanism (36) configured to switch the XO input buffer (32) and the impedance equivalence circuit (34) between the enabled state and the disabled state.
Abstract:
Multi-mode oscillators supporting multiple modes and having different desirable characteristics (e.g., good phase noise or low power consumption) in different modes are disclosed. In an exemplary design, an apparatus includes first and second transistors of a first transistor type (e.g., NMOS transistors) and third and fourth transistors of a second transistor type (e.g., PMOS transistors) for a multi-mode oscillator. The third and fourth transistors are coupled (e.g., directly) to the first and second transistors. The first and second transistors are enabled in a first mode to provide signal gain for the oscillator and generate an oscillator signal in the first mode. The first to fourth transistors are enabled in a second mode to provide signal gain for the oscillator and generate the oscillator signal in the second mode. Different supply voltages may be provided at different supply nodes of the oscillator in the first and second modes.
Abstract:
A wafer test probe for testing integrated circuitry on a die is disclosed. The wafer test probe includes a membrane core. The wafer test probe also includes circuitry within the membrane core. The circuitry within the membrane core includes at least one portion of an inductor. The wafer test probe further includes a probe tip.
Abstract:
An apparatus for implementing phase rotation at baseband frequency for transmit diversity may include a primary transmit signal path and a diversity transmit signal path. Both the primary transmit signal path and the diversity transmit signal path may receive a primary transmit signal. A signal selector within the diversity transmit signal path may perform phase rotation with respect to the primary transmit signal while the primary transmit signal is at a baseband frequency, thereby producing a diversity transmit signal.
Abstract:
A device includes a multi-mode low noise amplifier (LNA) having a first amplifier stage, and a second amplifier stage coupled to the first amplifier stage, the second amplifier stage having a plurality of amplification paths configured to amplify a plurality of carrier frequencies, the first amplifier stage configured to bypass the second amplifier stage when the first amplifier stage is configured to amplify a single carrier frequency.
Abstract:
Certain aspects of the present disclosure provide methods and apparatus for dynamically adjusting a voltage-controlled oscillator (VCO) frequency, a local oscillator (LO) divider ratio, and/or a receive path when adding or discontinuing reception of a component carrier (CC) in a carrier aggregation (CA) scheme. This dynamic adjustment is utilized to avoid (or at least reduce) VCO, LO, and transmit signal coupling issues with multiple component carriers, with minimal (or at least reduced) current consumption by the VCO and the LO divider.
Abstract:
Certain aspects of the present disclosure provide multi-way diversity receivers with multiple synthesizers. Such a multi-way diversity receiver may be implemented in a carrier aggregation (CA) transceiver. One example wireless reception diversity circuit generally includes three or more receive paths for processing received signals and two or more frequency synthesizing circuits configured to generate local oscillating signals to downconvert the received signals. Each of the frequency synthesizing circuits is shared by at most two of the receive paths, and each pair of the frequency synthesizing circuits may generate a pair of local oscillating signals having the same frequency.
Abstract:
A tunable oscillator circuit is disclosed. The tunable oscillator circuit includes an inductor/capacitor (LC) tank circuit comprising a primary inductor coupled in parallel with a first capacitor bank. The LC tank resonates to produce an oscillating voltage at a frequency. The tunable oscillator circuit also includes a 90 degree phase shift buffer coupled to the LC tank and a transconductor. The transconductor is coupled to the 90 degree phase shift buffer and a secondary inductor. The tunable oscillator circuit also includes a secondary inductor that is inductively coupled to the primary inductor and receives a gain-scaled oscillating current from the transconductor. By changing the transconductance, the gain-scaled oscillating current in the secondary inductor will change, thus the effective primary inductance and the oscillation frequency can be tuned.
Abstract:
A VCO includes a transformer-based resonator that has a first LC tank and a second LC tank. The resonator has an even resonant mode and an odd resonant mode. The VCO further includes an active transconductance network that is coupled to a two-terminal port of the first tank and is also coupled to a two-terminal port of the second tank. A first terminal of the port of the first tank is capacitively coupled to a first terminal of the port of the second tank. A second terminal of the port of the first tank is capacitively coupled to a second terminal of the port of the second tank. The active transconductance network causes the resonator to resonate in a selectable one of the even and odd resonant modes depending on a digital control signal. The VCO is fine tuned by changing the capacitances of capacitors of the tanks.