公开(公告)号：JP2003289047A

公开(公告)日：2003-10-10

申请号：JP2003108074

申请日：2003-04-11

Applicant: Sony Corp ,  ソニー株式会社

Inventor： HINO TOMOKIMI ,  ASANO TAKEHARU ,  ASAZUMA YASUNORI ,  KIJIMA SATORU ,  FUNATO KENJI ,  TOMITANI SHIGETAKA

IPC: H01L21/205 ,  H01L33/06 ,  H01L33/32 ,  H01L33/40 ,  H01S5/042 ,  H01S5/323 ,  H01S5/343 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a method for growing a mono-crystal nitride system group III-V compound semiconductor with low crystal failure density and high quality, and a semiconductor device manufactured by a growth method and a method for manufacturing the semiconductor device. SOLUTION: At the time of forming a growth mask on a substrate, and selectively growing a nitride system group III-V compound semiconductor on the substrate by using the growth mask, a stripe-shaped multi-layer film at least whose mostsurface is made of nitride, and whose width is 4.8 μm or less is used as the growth mask. The growth mask may be constituted of an oxide film and a nitride film on the oxide film, constituted of a metal film and a nitride film on the metal film, constituted of an oxide film and a film made of nitride and an oxide on the oxide film and a nitride film on the film, and constituted of a first metal film and a second metal film on the first metal film and the nitride film on the second metal film. COPYRIGHT: (C)2004,JPO

Abstract translation: 解决的问题：提供一种生长具有低晶体失效密度和高质量的单晶氮化物系III-V族化合物半导体的方法，以及通过生长方法制造的半导体器件和用于制造 半导体器件。 解决方案：在基板上形成生长掩模时，通过使用生长掩模选择性地在衬底上生长氮化物系III-V族化合物半导体，至少具有最大表面的条形多层膜 由氮化物制成，其宽度为4.8μm以下用作生长掩模。 生长掩模可以由氧化物膜和氮化物膜构成，氧化物膜由金属膜和金属膜上的氮化物膜构成，由氧化物膜和由氧化物构成的膜和氧化物上的氧化物构成 膜和氮化物膜，并且由第一金属膜上的第一金属膜和第二金属膜以及第二金属膜上的氮化物膜构成。 版权所有（C）2004，JPO

公开(公告)号：JP2000164929A

公开(公告)日：2000-06-16

申请号：JP33630798

申请日：1998-11-26

Applicant: SONY CORP

Inventor： TOMITANI SHIGETAKA ,  FUNATO KENJI

IPC: B29C43/22 ,  B29C43/28 ,  B29C59/00 ,  B29C59/04 ,  B32B37/15 ,  B32B38/04 ,  B32B38/06 ,  C30B25/02 ,  C30B25/18 ,  H01L21/20 ,  H01L21/205 ,  H01L33/00 ,  H01L33/02 ,  H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01L33/34 ,  H01S5/00 ,  H01S5/30 ,  H01S5/323 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To enable reduction of a threading dislocation density and suppression of deviation in a crystal orientation. SOLUTION: A plurality of facets 1 are arranged to cover an underlying semiconductor layer 2 and to form a selective-growth embedded semiconductor layer 3. A threading dislocation in the semiconductor layer 3 is flexedly extended in a direction, extending substantially along the arranged surface of the layer 2, so that the threading dislocations of the adjacent facets 1 meet and flex in a direction intersecting with the arrangement surface, thus forming a low defect density region and suppressing a deviation in crystal orientation.

公开(公告)号：JPH09252163A

公开(公告)日：1997-09-22

申请号：JP5784296

申请日：1996-03-14

Applicant: SONY CORP

Inventor： FUNATO KENJI ,  ASAZUMA YASUNORI ,  KAWAI HIROHARU

IPC: H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01S5/00 ,  H01S5/323 ,  H01S5/343 ,  H01S3/18 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To enhance the emission efficiency, improve the essential emission strength of a light-emitting layer and enable the emission by the carrier injection by limiting the thickness of this emitting layer to a specified range. SOLUTION: A semiconductor light-emitting element has a light-emitting layer set to 1.5-0.3nm thick. A first buffer layer 2 of 30nm thick is grown at low temp. on a substrate 1, a second buffer layer 3 is grown to 2μm thick, a first clad layer 4 composed of a light absorptive layer to be a first lower clad layer 4A of 0.1μm thick and upper clad layer 4B of 10nm thick is epitaxially grown on the buffer layer 3, an active layer 5 of 1nm thick and second clad layer 14 of 0.1μm thick are epitaxially grown. Thus it is possible to form a carrier injection type light-emitting element and short-wavelength light-emitting element for ultraviolet regions.

公开(公告)号：JP2541260B2

公开(公告)日：1996-10-09

申请号：JP33238387

申请日：1987-12-29

Applicant: SONY CORP

Inventor： MORI YOSHIFUMI ,  ISHIBASHI AKIRA ,  FUNATO KENJI

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/80

公开(公告)号：JPH0831757A

公开(公告)日：1996-02-02

申请号：JP18274194

申请日：1994-07-12

Applicant: SONY CORP

Inventor： ASANO TAKEHARU ,  TODA ATSUSHI ,  FUNATO KENJI

IPC: H01L21/203 ,  H01L21/205 ,  H01L33/28 ,  H01S5/00 ,  H01L33/00 ,  H01S3/18

Abstract: PURPOSE:To lower the growth temperature of a Te-based II-VI compound semiconductor in comparison with a conventional technique and obtain a sufficiently high growth rate in practical terms. CONSTITUTION:In growing a Te-based II-VI compound semiconductor layer, such as, a ZnTe layer 2, on a semiconductor substrate, such as, a GaAs substrate 1, by a vapor growth method like a metal organic chemical vapor deposition method, di-tertiary-butyltellurium is used as a Te material. The ratio of a group VI element to a group II element of a growth material is set to 0.7 to 3.7. The growth temperature Tg is set to 275 deg.C

公开(公告)号：JPH06318694A

公开(公告)日：1994-11-15

申请号：JP10556293

申请日：1993-05-06

Applicant: SONY CORP

Inventor： FUNATO KENJI ,  NAKAMURA FUMIHIKO

IPC: H01L29/205 ,  H01L29/68

Abstract: PURPOSE:To make the path of a current between an emitter electrode and a base electrode long by the width of a step-shaped guard ring and to reduce leakage current by a method wherein the guard ring is provided on an emitter barrier layer and (or) a collector barrier layer. CONSTITUTION:A collector layer 1, a collector barrier layer 2, a base layer 3, an emitter barrier layer 4 and an emitter layer 5 are formed sequentially. In this HET, a step-shaped guard ring 11 is provided at the peripheral part of one out of the emitter barrier layer 4 and the collector barrier layer 2. Since the width L1 of the guard ring 11 is long as compared with a first mesa 21 and a second mesa 22, the leakage currents between the emitter and the base and between the emitter and the collector can be reduced sharply.

公开(公告)号：JPH05206444A

公开(公告)日：1993-08-13

申请号：JP3700492

申请日：1992-01-28

Applicant: SONY CORP

Inventor： FUNATO KENJI ,  TAIRA KENICHI ,  NAKAMURA FUMIHIKO

IPC: H01L29/68

Abstract: PURPOSE:To provide a hot electron transistor in which the base resistance and the height of barrier for emitting hot electrons from the emitter to the base are controlled independently while furthermore high speed operation and enhancement of current gain are realized. CONSTITUTION:In a GaSb/InAs/GaSb hot electron transistor, base layer formed of InAs is doped with donar impurities in order to control the density of electron in the base layer. Base resistor and the height of barrier for emitting hot electrons from the emitter to the base are controlled through combination of control of doping of donar impurities into the layer and the control of base width.

公开(公告)号：JPH0590636A

公开(公告)日：1993-04-09

申请号：JP16251991

申请日：1991-06-07

Applicant: SONY CORP

Inventor： UGAJIN RYUICHI ,  FUNATO KENJI

IPC: H01L29/80 ,  H01L29/12 ,  H01L29/775 ,  H01L33/06 ,  H01L33/14 ,  H01L33/30 ,  H01L33/40 ,  H01S5/34

Abstract: PURPOSE:To materialize the quantum effect as the deformation of a band gap by controlling the probability of the electron transition between quantum boxes, in a quantum effect device using quantum boxes. CONSTITUTION:The rows of the quantum boxes 4 of double hetero structure are constituted of GaAs layers2 and AlGaAs layers 3 on an n-AlGaAs substrate 1, and the potential barriers provided between those quantum boxes 4 are set to be on different altitudes by two hetero junctions. By the field-effect from the control electrode 7 provided on the quantum box 4, one channel of the two hetero junctions is selected, and the tunnel transition probability is controlled from the difference of the height of the potential barrier. By the change of this tunnel transition probability, the quantum effect such as the deformation of a band gap, etc., can be gotten.

公开(公告)号：JPH04354164A

公开(公告)日：1992-12-08

申请号：JP15575591

申请日：1991-05-30

Applicant: SONY CORP

Inventor： FUNATO KENJI ,  UGAJIN RYUICHI

IPC: H01L29/80

Abstract: PURPOSE:To obtain a field effect transistor which is suitable for high-speed operation or room-temperature operation by modulating the speed of carriers. CONSTITUTION:An n-type AlGaAs layer 3 is formed on a GaAs substrate 1 so that a heterojunction interface can be obtained and an insulating area 2 is formed so as to divide the first carrier running layer into sections at a position near the heterojunction interface 1a side of the substrate 1. In addition, a gate electrode 4 is formed for selecting the carrier running layer. The second carrier running layer is formed with a gate bias at a part after crossing the insulating area 2. Therefore, such a semiconductor state as an HEMT is formed, because the running of electrons is not disturbed by the insulating area. When the first carrier running layer is selected with the gate bias, an insulated state is set, because the running of electrons is disturbed by the insulating area 2.

公开(公告)号：JPH0486826A

公开(公告)日：1992-03-19

申请号：JP20309190

申请日：1990-07-31

Applicant: SONY CORP

Inventor： ISHIBASHI AKIRA ,  FUNATO KENJI ,  UGAJIN RYUICHI

IPC: G03F7/004 ,  H01L21/027

Abstract: PURPOSE:To attain the resolving power equivalent to the resolving power in the case of execution of exposing with light of a shorter wavelength even in the case of execution of the exposing with the light of a longer wavelength by incorporating org. matter having large epsilonmu into the above photoresist when the dielectric constant is designated as epsilon and the magnetic permeability as mu. CONSTITUTION:A substrate formed with a prescribed pattern to be formed is designated as 1, the photoresist contg. the org. matter having the large muepsilonas 2 and the mask for exposing as 3. If the light 4 for exposing is made incident on the photoresist from the inside of vacuum, equation is obtd. where the wave length and velocity of the lighty 4 in the vacuum are respectively designated as lambda and c and the wavelength and velocity of the lighty 4 in the photoresist 2 respectively as lambda' and c'. From the equation, the wavelength lambda' is (epsilon0mu0) /(muepsilon) times wavelength lambda and lambda' can be sufficiently diminished by making muepsilon sufficiently large. The wavelength lambda' is sufficiently decreased in such a manner, by which the infiltrating of the light 4 to the lower side of the mask 3 is extremely lessened. Namely, the diffraction of the lighty 4 by the mask 3 is extremely lessened.