公开(公告)号：DE69936564D1

公开(公告)日：2007-08-30

申请号：DE69936564

申请日：1999-11-23

Applicant: SONY CORP

Inventor： HINO TOMONORI ,  ASANO TAKEHARU ,  ASATSUMA TSUNENORI ,  KIJIMA SATORU ,  FUNATO KENJI ,  TOMIYA SHIGETAKA

IPC: H01L21/20 ,  H01L21/033 ,  H01L33/06 ,  H01L33/32 ,  H01L33/34 ,  H01L33/40 ,  H01S5/00 ,  H01S5/042 ,  H01S5/20 ,  H01S5/30 ,  H01S5/323 ,  H01S5/343

Abstract: When making a growth mask on a substrate and using the growth mask to selectively grow nitride III-V compound semiconductors on the substrate, a multi-layered film including a nitride forming at least its top surface is used as the growth mask. The growth mask may be combination of an oxide film and a nitride film thereon, combination of a metal film and a nitride film thereon, combination of an oxide film, a film thereon made up of a nitride and an oxide, and a nitride film thereon, or combination of a first metal film, a second metal film thereon different from the first metal film and a nitride film thereon, for example. The oxide film may be a SiO2, for example, the nitride film may be a TiN film or a SiN film, the film made up of a nitride and an oxide may be a SiNO film, and the metal film may be a Ti film or a Pt film, for example.

公开(公告)号：DE69936564T2

公开(公告)日：2008-04-03

申请号：DE69936564

申请日：1999-11-23

Applicant: SONY CORP

Inventor： HINO TOMONORI ,  ASANO TAKEHARU ,  ASATSUMA TSUNENORI ,  KIJIMA SATORU ,  FUNATO KENJI ,  TOMIYA SHIGETAKA

IPC: H01L21/20 ,  H01L21/033 ,  H01L33/06 ,  H01L33/32 ,  H01L33/34 ,  H01L33/40 ,  H01S5/00 ,  H01S5/042 ,  H01S5/20 ,  H01S5/30 ,  H01S5/323 ,  H01S5/343

Abstract: When making a growth mask on a substrate and using the growth mask to selectively grow nitride III-V compound semiconductors on the substrate, a multi-layered film including a nitride forming at least its top surface is used as the growth mask. The growth mask may be combination of an oxide film and a nitride film thereon, combination of a metal film and a nitride film thereon, combination of an oxide film, a film thereon made up of a nitride and an oxide, and a nitride film thereon, or combination of a first metal film, a second metal film thereon different from the first metal film and a nitride film thereon, for example. The oxide film may be a SiO2, for example, the nitride film may be a TiN film or a SiN film, the film made up of a nitride and an oxide may be a SiNO film, and the metal film may be a Ti film or a Pt film, for example.

公开(公告)号：DE69918643T2

公开(公告)日：2005-07-21

申请号：DE69918643

申请日：1999-11-26

Applicant: SONY CORP

Inventor： TOMIYA SHIGETAKA ,  FUNATO KENJI

IPC: B29C43/22 ,  B29C43/28 ,  B29C59/00 ,  B29C59/04 ,  B32B37/15 ,  B32B38/04 ,  B32B38/06 ,  C30B25/02 ,  C30B25/18 ,  H01L21/20 ,  H01L21/205 ,  H01L33/00 ,  H01L33/02 ,  H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01L33/34 ,  H01S5/00 ,  H01S5/30 ,  H01S5/323 ,  H01S5/343

Abstract: A semiconductor thin film of e.g. G or N includes an underlying semiconductor layer (2) in which a plurality of facets (1) are arranged, and a selectively grown/buried semiconductor layer (3) formed to cover the underlying semiconductor layer (2), wherein the facets (1) are formed by planes tilted with respect to the disposition plane of the underlying semiconductor layer (2). In this semiconductor thin film, threading-dislocations (d) are formed in the selectively grown/buried semiconductor layer (3) in such a manner that each of the threading-dislocations (d) bendingly extends from one of the facets (1) of the underlying semiconductor layer (2) in the direction substantially along the disposition plane of the underlying semiconductor layer (2), being joined to another of the threading-dislocations (d) bendingly extending from the opposed one of the facets (1), and bendingly extends from the joined portion in the direction crossing the disposition plane of the underlying semiconductor layer (2).

公开(公告)号：DE69918643D1

公开(公告)日：2004-08-19

申请号：DE69918643

申请日：1999-11-26

Applicant: SONY CORP

Inventor： TOMIYA SHIGETAKA ,  FUNATO KENJI

IPC: B29C43/22 ,  B29C43/28 ,  B29C59/00 ,  B29C59/04 ,  B32B37/15 ,  B32B38/04 ,  B32B38/06 ,  C30B25/02 ,  C30B25/18 ,  H01L21/20 ,  H01L21/205 ,  H01L33/00 ,  H01L33/02 ,  H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01L33/34 ,  H01S5/00 ,  H01S5/30 ,  H01S5/323 ,  H01S5/343

Abstract: A semiconductor thin film of e.g. G or N includes an underlying semiconductor layer (2) in which a plurality of facets (1) are arranged, and a selectively grown/buried semiconductor layer (3) formed to cover the underlying semiconductor layer (2), wherein the facets (1) are formed by planes tilted with respect to the disposition plane of the underlying semiconductor layer (2). In this semiconductor thin film, threading-dislocations (d) are formed in the selectively grown/buried semiconductor layer (3) in such a manner that each of the threading-dislocations (d) bendingly extends from one of the facets (1) of the underlying semiconductor layer (2) in the direction substantially along the disposition plane of the underlying semiconductor layer (2), being joined to another of the threading-dislocations (d) bendingly extending from the opposed one of the facets (1), and bendingly extends from the joined portion in the direction crossing the disposition plane of the underlying semiconductor layer (2).

公开(公告)号：JP2008135768A

公开(公告)日：2008-06-12

申请号：JP2007338846

申请日：2007-12-28

Applicant: Sony Corp ,  ソニー株式会社

Inventor： FUNATO KENJI ,  NAKAMURA FUMIHIKO ,  HASHIMOTO SHIGEKI

IPC: H01L21/205 ,  C23C16/34 ,  H01L21/338 ,  H01L29/778 ,  H01L29/812 ,  H01L33/32 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To provide a growing method of a nitride-based group III-V compound semiconductor layer capable of growing the nitride group III-V compound semiconductor layer on a substrate with good crystal quality. SOLUTION: When a GaN layer is grown on a substrate by a chemical vapor deposition method, and an AlGaN layer is grown on this GaN layer by the chemical vapor deposition method, the GaN layer is grown, with the molar ratio of a supply amount of a raw material N to the supply amount of a raw material of Ga set at ≥8,000, preferably ≥10,000, and more preferably ≥11,000. An Al 2 O 3 substrate, a ZnO substrate, and a SiC substrate are used as a substrate. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 解决的问题：提供能够在具有良好晶体质量的基板上生长氮化物III-V族化合物半导体层的基于氮化物的III-V族化合物半导体层的生长方法。 解决方案：通过化学气相沉积法在衬底上生长GaN层，并且通过化学气相沉积法在该GaN层上生长AlGaN层，生长GaN层，其摩尔比为 将原材料N的供给量设定为Ga≥8,000的原料的供给量，优选为≥10,000，更优选为≥11,000。 使用Al 2 SB 3 O 3，基板，ZnO基板和SiC基板作为基板。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JPH07211886A

公开(公告)日：1995-08-11

申请号：JP2220094

申请日：1994-01-21

Applicant: SONY CORP

Inventor： FUNATO KENJI

IPC: H01L29/68 ,  H01L29/205

Abstract: PURPOSE:To obtain high-speed operation and to improve current amplification factor by making the scattering of electrons running through a conduction band hard to occur, and improving the operating frequency. CONSTITUTION:This is a hot-electron transistor 1 using thermoionic emission. At least a collector layer 11 of the transistor is formed of a compound semiconductor comprising a group II element and a group VI element, that is to say, the compound semiconductor of zinc, selenium and tellurium (ZnSeTe). An emitter layer is also formed of the compound semiconductor of the group II element and the group VI element, that is to say, the compound semiconductor of zinc, selenium and tellurium (ZnSeTe).

公开(公告)号：JPH06196808A

公开(公告)日：1994-07-15

申请号：JP35679792

申请日：1992-12-22

Applicant: SONY CORP

Inventor： UGAJIN RYUICHI ,  FUNATO KENJI

IPC: H01S5/00 ,  H01S5/343 ,  H01S3/18

Abstract: PURPOSE:To emit far infrared light by injecting electrons into a second semiconductor layer from the third, semiconductor layer side while infecting holes into the second semiconductor layer from the first semiconductor layer side and emitting light by the recombination of electrons and holes. CONSTITUTION:A p-type AlSb layer 2, an InAs layer 3, a GaSb layer 4 and an InAs layer 5 are laminated successively on a p-type GaAs substrate 1. When InAs and GaSb are brought into contact and a combination is formed, the electrons of a valence band on the GaSb side falls to a conduction band on the InAs side, and holes are generated on the GaSb side in a GaSb/InAs hetero- interface and the electrons of the conduction band on the InAs side. Light is emitted by electron-hole pair annihilation, and laser oscillation is generated by optical confinement by the permittivity difference of a GaSb/InAs hetero-junction. Accordingly, the wavelength of oscillated laser beams is used as the wavelength of a far infrared light region.

公开(公告)号：JPH04112593A

公开(公告)日：1992-04-14

申请号：JP23153390

申请日：1990-08-31

Applicant: SONY CORP

Inventor： FUNATO KENJI ,  ISHIBASHI AKIRA

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/778 ,  H01S5/00

Abstract: PURPOSE:To control a sub-band by applying a magnetic field in the axial direction of multiple connected channels and changing the magnetic field. CONSTITUTION:When a magnetic field is applied in the axial direction of multiple connected channels formed by the columnar surface-shaped two-dimensional electron gas 2DEG 6 of undoped GaAs 1, rotational energy Erot generated is obtained from specified formula, and can be modulated by changing magnetic flux PHI. Accordingly, the magnitude of the magnetic field applied is varied, thus controlling a sub-band in an undoped GaAs layer 15 as an active layer, then controlling an oscillatory wavelength.

公开(公告)号：JPH02305478A

公开(公告)日：1990-12-19

申请号：JP12756389

申请日：1989-05-19

Applicant: SONY CORP

Inventor： ISHIBASHI AKIRA ,  FUNATO KENJI

IPC: H01L29/80 ,  H01L21/338 ,  H01L29/778 ,  H01L29/812 ,  H01L39/00

Abstract: PURPOSE:To obtain a semiconductor device of high performance by a method wherein a magnetic field is applied to a space surrounded by two-dimensional electron gas or two-dimensional hole gas, and electrons or holes constituting two-dimensional electron gas or two-dimensional hole gas are made Bose particles. CONSTITUTION:Doubly coupled two-dimensional electron gas or two-dimensional hole gas (2DEG) 7 is provided in an undoped GaAs layer 5 adjacent to a hetero- interface between N-type AlGaAs layers 4 and 6 and the undoped GaAs layer 5, and a magnetic flux is made to pass in the direction of the center axis of the GaAs layer 5 penetrating through a space surrounded with the 2DEG 7 to turn electrons into Bose particles. Electrons or holes turned into Bose particles are used as carriers. As the Bose particles concerned conform to the Bose-Einstein statics, a phenomenon that a large number of particles occupy the same quantum level or degeneracy occurs. By this setup, electrons or holes turned into Bose particles are used as carriers, whereby a semiconductor device high in current carrying capacity and performance and operable at an ultra-high speed can be obtained.

公开(公告)号：JPH01175264A

公开(公告)日：1989-07-11

申请号：JP33238387

申请日：1987-12-29

Applicant: SONY CORP

Inventor： MORI YOSHIFUMI ,  ISHIBASHI AKIRA ,  FUNATO KENJI

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/80

Abstract: PURPOSE:To obtain a field-effect transitor whose gate length is very fine by a method wherein a gate part is irradiated with an electron beam, a resist material to be used as a mask during formation of a gate is deposited, a carrier concentration value of delta doped layer just under the part irradiated with the electron beam is lowered and a channel region is formed. CONSTITUTION:An insulating AlGaAs layer 2 is formed on a GaAs substrate 1; after that, a GaAs layer 3a as a semiconductor layer causing discontinuity is formed without being doped with an impurity; a delta doped Si layer 4 doped with an impurity ot high concentration on the way is formed; in additon, an insulating GaAs layer 3b is formed on it. Then, ohmic metal layers 7a, 7b are formed selectively; after that, they are alloyed; a source region 5 and a drain region 6 are formed in the insulating GaAs layer 3a, 3b. Then, Al to be used as a gate metal is evaporated on the front; an Al layer 8 is formed; after that, a part used to form a gate is irradiated with an electron beam 9 in an atmosphere containing, e.g., alkyl naphthalene as a raw material gas; a resist material 10 is deposited. The, the Al layer 8 is etched by making use of the resist material 10 as a mask; a gate 11 is formed; a field-effect transistor 13 whose gate length Lg is very fine is manufactured.