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公开(公告)号：FR2515907B1
公开(公告)日：1988-12-09
申请号：FR8218628
申请日：1982-11-05
Applicant: SONY CORP
Inventor： FUJIMURA YASUSHI , OKADA TAKASHI , TANAKA YUTAKA , IKEDA YASUNARI
Abstract: A double-scanning non-interlace television receiver for receiving an interlace television signal having alternating odd and even fields of scan lines which are normally interlaced, as displayed, comprises a receiver circuit which receives the interlace television signal and generates received line signals representative of the scan lines of a field being received, a visual display apparatus, and a non-interlace converting circuit connected to the receiver circuit which generates an averaged line signal from two consecutive received line signals and serially supplies the averaged line signal and the consecutive received line signals to the visual display apparatus for display by the latter, with each averaged line signal being supplied and displayed between the respective received line signals.
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公开(公告)号：GB2127252B
公开(公告)日：1987-01-14
申请号：GB8322608
申请日：1983-08-23
Applicant: SONY CORP
Inventor： TANAKA YUTAKA , IKEDA YASUNARI , NAKANO HIROSHI
Abstract: A television receiver having a signal input terminal supplied with an interlace video signal and a signal coverter connected to the input terminal for converting the interlace video signal to a non-interlace signal to be displayed. The signal converter includes a signal inserting circuit for inserting new line signals between two successive line signals of the interlace signal, the new line signals being formed by interpolating one of the preceding and succeeding line signals in the interlace signal. A three dimensional filter is connected to the signal converter for attentuating vertical and horizontal high frequency components in the non-interlace video signal only when the non-interlace signal includes both of the vertical and horizontal high frequency components.
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公开(公告)号：GB2111797B
公开(公告)日：1985-05-15
申请号：GB8232176
申请日：1982-11-11
Applicant: SONY CORP
Inventor： IKEDA YASUNARI
Abstract: A double-scanning non-interlace color television receiver which receives an interlace color television signal having alternating odd and even fields of scanned lines which are normally interlaced, as displayed, comprises a receiver circuit which receives the interlace color television signal and includes a circuit which generates respective chroma and luminance scanning line signals in response thereto, a visual display apparatus, and a non-interlace converting circuit with a luminance double-scanning circuit which generates an averaged luminance scanning line signal from each two consecutive luminance scanning line signals of the same field, and which supplies the consecutive luminance scanning line signals and the averaged luminance scanning line signal to the visual display apparatus for display by the latter of each averaged luminance scanning line signal between the respective two consecutive luminance scanning line signals, and a circuit which supplies to the visual display apparatus color difference signals derived from the chroma scanning line signal corresponding to one of the two consecutive luminance scanning line signals for display in synchronism with the averaged luminance scanning line signal.
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公开(公告)号：GB2127252A
公开(公告)日：1984-04-04
申请号：GB8322608
申请日：1983-08-23
Applicant: SONY CORP
Inventor： TANAKA YUTAKA , IKEDA YASUNARI , NAKANO HIROSHI
Abstract: A television receiver having a signal input terminal supplied with an interlace video signal and a signal coverter connected to the input terminal for converting the interlace video signal to a non-interlace signal to be displayed. The signal converter includes a signal inserting circuit for inserting new line signals between two successive line signals of the interlace signal, the new line signals being formed by interpolating one of the preceding and succeeding line signals in the interlace signal. A three dimensional filter is connected to the signal converter for attentuating vertical and horizontal high frequency components in the non-interlace video signal only when the non-interlace signal includes both of the vertical and horizontal high frequency components.
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Patent Agency Ranking
公开(公告)号：FR2532501A1
公开(公告)日：1984-03-02
申请号：FR8313735
申请日：1983-08-25
Applicant: SONY CORP
Inventor： TANAKA YUTAKA , IKEDA YASUNARI , NAKANO HIROSHI
Abstract: A television receiver having a signal input terminal supplied with an interlace video signal and a signal coverter connected to the input terminal for converting the interlace video signal to a non-interlace signal to be displayed. The signal converter includes a signal inserting circuit for inserting new line signals between two successive line signals of the interlace signal, the new line signals being formed by interpolating one of the preceding and succeeding line signals in the interlace signal. A three dimensional filter is connected to the signal converter for attentuating vertical and horizontal high frequency components in the non-interlace video signal only when the non-interlace signal includes both of the vertical and horizontal high frequency components.
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公开(公告)号：FR2515907A1
公开(公告)日：1983-05-06
申请号：FR8218628
申请日：1982-11-05
Applicant: SONY CORP
Inventor： FUJIMURA YASUSHI , OKADA TAKASHI , TANAKA YUTAKA , IKEDA YASUNARI
Abstract: A double-scanning non-interlace television receiver for receiving an interlace television signal having alternating odd and even fields of scan lines which are normally interlaced, as displayed, comprises a receiver circuit which receives the interlace television signal and generates received line signals representative of the scan lines of a field being received, a visual display apparatus, and a non-interlace converting circuit connected to the receiver circuit which generates an averaged line signal from two consecutive received line signals and serially supplies the averaged line signal and the consecutive received line signals to the visual display apparatus for display by the latter, with each averaged line signal being supplied and displayed between the respective received line signals.
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公开(公告)号：BR0101472B1
公开(公告)日：2014-08-12
申请号：BR0101472
申请日：2001-04-12
Applicant: SONY CORP
Inventor： OKADA TAKAHIRO , MIYATO YOSHIKAZU , IKEDA YASUNARI , IKEDA TAMOTSU
Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.
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公开(公告)号：DE69835254T2
公开(公告)日：2007-06-14
申请号：DE69835254
申请日：1998-04-30
Applicant: SONY CORP
Inventor： HYAKUDAI TOSHIHISA , OKADA TAKAHIRO , IKEDA YASUNARI
Abstract: A technique for receiving an OFDM signal is arranged to accurately reproduce a clock signal. I channel data and Q channel data are differential-demodulated by a differential demodulation circuit (503) and are supplied to a ROM (512). The ROM (512) reads out an intersymbol phase change amount corresponding to the differential-demodulated data and supplies it to a gate circuit (514) which extracts only a component corresponding to each one of pilot signals in the input data, and supplies the extracted component to a sign inversion circuit (521) and to a selector (522). The selector (522) selects the output from the gate circuit (514) if the pilot signal is a positive frequency value, or the output from the sign inversion circuit (521) if the pilot signal is a negative frequency value, and supplies the obtained value to a cumulative addition circuit (515). The cumulative addition circuit (515) performs cumulative addition of values output from the selector (522) over a symbol period, and outputs the addition result to an average circuit (516). The average circuit (516) averages the output from the cumulative addition circuit (515) and controls the frequency of oscillation of a clock signal according to a value obtained by the average circuit (516).
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公开(公告)号：DE69531234T2
公开(公告)日：2004-04-22
申请号：DE69531234
申请日：1995-08-31
Applicant: SONY CORP
Inventor： IKEDA TAMOTSU , IKEDA YASUNARI , OKADA TAKAHIRO
Abstract: The present invention is used for example digital television broadcasting and provides a good television picture and sound where the signal level is large on the reception side and provides a television picture and sound of a certain degree of quality even in a case where the signal level is small. The signal transmitting apparatus (10) divides the series of input information in accordance with the significance of the content of the data to obtain a plurality of input signals, encodes the input signals with respectively different encoding rates, multiplexes the same at the time slots for transmission, modulates the same by multi-value modulation methods different for every time slot corresponding to the coded signals, and transmits the resultant data via the communication transmission line (20) such as a satellite communication channel to the signal receiving apparatus (30). The signal receiving apparatus (30) demodulates the respective coded signals from the modulated signals received from the communication transmission line (20) by demodulation methods different for every time slot corresponding to the coded signals contained in the received signals, demultiplexes the same, decodes the result, and reproduces the respective input signals.
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