公开(公告)号：KR850000689B1

公开(公告)日：1985-05-14

申请号：KR810000673

申请日：1981-03-02

Applicant: SONY CORP

Inventor： OKADA TAKASHI

IPC: H01F38/42 ,  H04N9/77

公开(公告)号：KR830000269B1

公开(公告)日：1983-02-25

申请号：KR820004246

申请日：1982-09-20

Applicant: SONY CORP

Inventor： OKADA TAKASHI

IPC: H04N5/48

Abstract: In a television receiver, the luminance control cct. having black level detect means(10a,30c,30d) produces a control signal in response to a video signal exceeding an end of the dynamic range of a cathode ray tube(13). Gain control ccts. in the path of the video signal to the cathode ray tube adjust their gain in response to the control signal to maintain the video signal within the dynamic range of the cathode ray tube. The end of the dynamic range at which the video signal may be controlled includes one or both of the white peak and black levels. The control signal may be responsive to an average cathode ray tube beam current exceeding a predetd. value.

公开(公告)号：KR830000268B1

公开(公告)日：1983-02-25

申请号：KR790003998

申请日：1979-11-15

Applicant: SONY CORP

Inventor： OKADA TAKASHI

IPC: H04N5/48

Abstract: The luminance control cct. for a television receiver produces a control signal is response to a video signal exceeding an end of the dynamic range of a cathode ray tube. Gain control ccts.(10)(12) in the path of the video signal to the cathode ray tube adjust their gain in response to the control signal to maintain the video signal within the dynamic range of the cathode ray tube. The end of the dynamic range at which the video signal may be controlled includes one or both of the white peak and black levels. The control signal may also be responsive to an average cathode ray tube beam current exceeding a predetd. value.

公开(公告)号：KR840002029B1

公开(公告)日：1984-11-05

申请号：KR810000859

申请日：1981-03-17

Applicant: SONY CORP

Inventor： OKADA TAKASHI

IPC: H04N5/20

公开(公告)号：US3906246A

公开(公告)日：1975-09-16

申请号：US48036774

申请日：1974-06-18

Applicant: SONY CORP

Inventor： OKADA TAKASHI

IPC: H03G3/10 ,  G06G7/163 ,  H03G1/00 ,  H03G3/30 ,  G06G7/16

CPC classification number: G06G7/163 ,  H03G1/0017

Abstract: A transistor control circuit capable of functioning in various modes of operation. The circuit is comprised of four interconnected transistors and three current sources such that the collector currents of the respective transistors admit of the relationship wherein the product of first and second collector currents is equal to the product of third and fourth collector currents such that the output collector current is a function of the first, second and third collector currents. At least one of the current sources includes a signaling source for supplying an input signal current, another of said current sources includes a controllable current source and the other of said current sources comprises a fixed current source. The resultant output collector current can thus be controlled to be proportional to the product of the input signal current and the controlled current, and can be controlled to be proportional to the quotient of the input signal current divided by the controlled current.

Abstract translation: 一种能够在各种工作模式下工作的晶体管控制电路。 该电路由四个互连晶体管和三个电流源组成，使得相应晶体管的集电极电流允许第一和第二集电极电流的乘积等于第三集电极电流和第四集电极电流的乘积，使得输出集电极 电流是第一，第二和第三集电极电流的函数。 电流源中的至少一个包括用于提供输入信号电流的信号源，另一个所述电流源包括可控电流源，并且所述电流源中的另一个包括固定电流源。 因此，所得到的输出集电极电流可以被控制成与输入信号电流和受控电流的乘积成比例，并且可以被控制成与输入信号电流除以受控电流的商成正比。

公开(公告)号：US3892983A

公开(公告)日：1975-07-01

申请号：US39930573

申请日：1973-09-21

Applicant: SONY CORP

Inventor： OKADA TAKASHI ,  NAKAMURA ISA

IPC: H04B1/10 ,  H03F3/72 ,  H03K17/60 ,  H03K17/62 ,  H04N9/71 ,  H03F1/00

CPC classification number: H04N9/71 ,  H03F3/72 ,  H03K17/60

Abstract: A switching circuit in which the signal path between a signal input and a signal output terminal includes at least two amplifier stages, the first one of which has its collector connected in a series circuit with a load impedance and the emitter-collector circuit of a switching transistor. The switching transistor is switched between a conductive and a nonconductive state by a switching voltage applied to its base. The base of a second amplifier stage is connected between the collector of the first stage and the load so that when the switching transistor is made non-conductive by preventing current from flowing in its emitter-collector circuit but also makes the second stage non-conductive by reducing its base current to zero. Making the first stage non-conductive keeps it from amplifying the signal and requires any leakage current to pass around the first stage by means of stray capacitance. Making the first and second stages non-conductive simultaneously prevents even the leakage current from being amplified and allows the leakage current to reach the output terminal only by way of a second stray capacitance, which further reduces the amplitude of such current. A cascode stage may be included between the first and second stages to be rendered non-conductive along with them as a further means of amplifying the signal when the transistors are operative and decoupling the signal when the transistors are nonconductive. Instead of a simple cascode stage, a differential amplifier stage may be included between the first and second stages to provide means for adjusting the gain of the circuit.

Abstract translation: 一种开关电路，其中信号输入端和信号输出端之间的信号路径包括至少两个放大级，其中第一放大级的集电极连接在具有负载阻抗的串联电路中，并且发射极 - 集电极电路的开关 晶体管。 开关晶体管通过施加到其基极的开关电压在导通状态和非导通状态之间切换。 第二放大器级的基极连接在第一级的集电极和负载之间，使得当开关晶体管通过防止电流在其发射极 - 集电极电路中流动而变得不导通，而且使第二级不导通 通过将其基极电流减小到零。 使第一级不导通，使其不会放大信号，并且需要任何漏电流通过杂散电容通过第一级。 使第一和第二级不导通同时防止漏电流被放大，并且允许泄漏电流仅通过第二杂散电容到达输出端，这进一步减小了这种电流的幅度。 可以将第一和第二级之间的共源共栅级包括在与它们一起变得不导通的同时，作为当晶体管工作时放大信号并在晶体管不导通时对信号进行去耦的另一种手段。 代替简单的共源共栅级，可以在第一级和第二级之间包括差分放大器级，以提供用于调整电路的增益的装置。

公开(公告)号：US3876934A

公开(公告)日：1975-04-08

申请号：US39904573

申请日：1973-09-20

Applicant: SONY CORP

Inventor： OKADA TAKASHI ,  NIIMURA TSUTOMU

IPC: H03H11/20 ,  H04N9/45 ,  G01R25/04

CPC classification number: H03H11/20

Abstract: In a phase shifting circuit particularly adapted to be formed as an integrated circuit, for example, for use in the chrominance channel of a color television receiver, the base-emitter resistance of a transistor and a capacitor form a series circuit receiving input signals of opposed polarity at its opposite ends, the collector-emitter path of the transistor is connected across a power supply source, and a variable constant current source is connected with the transistor''s emitter for controlling the emitter current and thereby varying the emitter internal resistance so that the phase of an output signal derived from the emitter is determined by the value of the constant current transmitted through the variable constant current source. The variable constant current source may be constituted by a second transistor through the collector-emitter path of which the emitter of the first mentioned transistor is connected to the respective side of the power supply source, and a source of a variable D.C. bias current to the base of the second transistor.

公开(公告)号：US3678185A

公开(公告)日：1972-07-18

申请号：US3678185D

申请日：1971-03-12

Applicant: SONY CORP

Inventor： OKADA TAKASHI

IPC: H03D3/00 ,  H03D1/22 ,  H03D5/00 ,  H03D13/00 ,  H04N5/12 ,  H04N9/66 ,  H04N9/50

CPC classification number: H04N9/66 ,  H03D1/229 ,  H03D13/007 ,  H04N5/126

Abstract: A semiconductor circuit for phase comparison which is devoid of capacitors and hence is suitable for use in an integrated circuit network, comprises a pair of transistors of the same conductivity type connected in the form of a differential amplifier and first and second bridging circuits including groups of series connected diodes and extending between one electrode of one of the transistors and the same electrode of the other transistor. The two input signals which are to be phase compared with each other are respectively supplied to one of the transistors and to the first bridging circuit, and a compared output signal is picked up from the second bridging circuit.

Abstract translation: 一种用于相位比较的半导体电路，其不含电容器，因此适用于集成电路网络，包括以差分放大器形式连接的相同导电类型的一对晶体管，以及第一和第二桥接电路，包括： 串联连接的二极管并且在一个晶体管的一个电极和另一个晶体管的相同电极之间延伸。 要相互比较的两个输入信号分别提供给晶体管中的一个和第一桥接电路，并且从第二桥接电路拾取比较的输出信号。

公开(公告)号：US3919567A

公开(公告)日：1975-11-11

申请号：US39930473

申请日：1973-09-21

Applicant: SONY CORP

Inventor： OKADA TAKASHI ,  UTSUNOMIYA KIMITAKE

IPC: H03F3/72 ,  H03K17/60 ,  H04N9/455 ,  H03K17/00

CPC classification number: H04N9/455 ,  H03F3/72 ,  H03K17/603

Abstract: A differential circuit including first and second differentially connected semiconductor devices and a third semiconductor device connected in series between the common terminal of the differentially connected devices and one of the power supply terminals. The series connected device is non-conductive between gating pulses, so no current flows through any of the semiconductor devices except during gating pulses. The information signal to be gated is applied to the series-connected device, and the gating signal is also applied to this device and to one of the differentially connected semiconductor devices. For at least part of each gating pulse, the signal to be gated is amplified by both the series-connected device and one of the differentially connected devices. At the beginning and end of each pulse, the other differentially connected device may be conductive to act as a virtual short circuit to prevent the one differentially connected device from amplifying any signals which are within a gating pulse interval but are not supposed to pass through the gate circuit.

Abstract translation: 一种差分电路，包括第一和第二差分连接的半导体器件和串联连接在差分连接器件的公共端子和一个电源端子之间的第三半导体器件。 串联连接的器件在选通脉冲之间不导通，因此除了门控脉冲之外，没有电流流过任何半导体器件。 要门控的信息信号被施加到串联设备，并且门控信号也被施加到该器件和差分连接的半导体器件之一。 对于每个选通脉冲的至少一部分，要门控的信号由串联连接的设备和差分连接的设备之一放大。 在每个脉冲的开始和结束时，另一个差分连接的器件可能是导通的，以充当虚拟短路，以防止一个差分连接的器件放大在门控脉冲间隔内的任何信号，但不应该通过 门电路。

公开(公告)号：US3879576A

公开(公告)日：1975-04-22

申请号：US34677973

申请日：1973-04-02

Applicant: SONY CORP

Inventor： OKADA TAKASHI ,  SUMIYA HIROUYKI ,  IMAYASU TOMOYOSHI

IPC: H04N5/08 ,  H03B1/00

CPC classification number: H04N5/08

Abstract: In a synchronizing signal separating circuit comprising an amplifier circuit receiving a composite signal, for example, a video signal, and a self-biasing circuit that includes a capacitor which is charged during each synchronizing signal period of the composite signal and then discharged during the subsequent information signal period; a constant current circuit is provided for discharging of the capacitor so that the separated synchronizing signals obtained as the output of the amplifier circuit will have a uniform pulse width irrespective of the amplitudes of the intervening information signals.

Abstract translation: 在包括接收复合信号的放大器电路（例如，视频信号）的同步信号分离电路和包括在复合信号的每个同步信号周期期间被充电然后在后续期间放电的电容器的自偏置电路 信息信号周期; 提供恒流电路用于放电电容器，使得作为放大器电路的输出获得的分离的同步信号将具有均匀的脉冲宽度，而与中间信息信号的幅度无关。