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公开(公告)号:DE602008002849D1
公开(公告)日:2010-11-18
申请号:DE602008002849
申请日:2008-04-18
Applicant: ST MICROELECTRONICS SA
Inventor: BARDOUILLET MICHEL
IPC: G06F11/14
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公开(公告)号:DE602004013885D1
公开(公告)日:2008-07-03
申请号:DE602004013885
申请日:2004-06-10
Applicant: ST MICROELECTRONICS SA
Inventor: BARDOUILLET MICHEL , ORLANDO WILLIAM , MALHERBE ALEXANDRE , ANGUILLE CLAUDE
Abstract: The circuit has an input shift register (41) to receive bits flow and a comparator (42) to compare content of the register with predetermined patterns stored in a table (43). A load detector (44) detects overflow of counters with respect to a determined threshold. The detector provides the result to condition the state of a word or randomness validation bit of bit stream provided by random number generator.
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公开(公告)号:DE69936439D1
公开(公告)日:2007-08-16
申请号:DE69936439
申请日:1999-12-20
Applicant: ST MICROELECTRONICS SA
Inventor: WUIDART LUC , BARDOUILLET MICHEL
Abstract: The transponder is of the type having an oscillating circuit (L2,C2) in front of a rectifier circuit (13) designed to produce a continuous voltage (Va) to an electronic circuit (17). The circuit (17) includes means for emitting digital data codes. The transponder has two capacitive modulation circuits (C2,K1; C4,K2) respectively associated with each end terminal of an inductive part (L2) of the oscillating circuit. A reference terminal of each modulating circuit is connected to a reference voltage (15) of the electronic circuit supply
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公开(公告)号:DE69934353T2
公开(公告)日:2007-07-12
申请号:DE69934353
申请日:1999-04-16
Applicant: ST MICROELECTRONICS SA
Inventor: BARDOUILLET MICHEL
Abstract: The circuit includes a bridge providing a control signal derived from the phase of the input supply. The circuit supplies a load with a voltage which is approximately continuous (Vout), deriving this an alternating supply (Vin) by rectification. The circuit includes a device (1') for extracting from the rectified voltage (Vr) information which is function of the variation in phase angle of the alternating input voltage. A diode (D) is provided to ensure that the output voltage (Vout) remains constant regardless of the phase of the input. Across the output terminals of the rectifier there is a capacitor (C), and a voltage divider bridge (R1, R2), delivering a low voltage which is proportional to the rectified voltage. An integration device (6) delivers a voltage (Vp) which has an analogue function of the phase angle of the supply. This is applied as an input to an energy conversion circuit (4), in order to regulate the final output.
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公开(公告)号:DE69934353D1
公开(公告)日:2007-01-25
申请号:DE69934353
申请日:1999-04-16
Applicant: ST MICROELECTRONICS SA
Inventor: BARDOUILLET MICHEL
Abstract: The circuit includes a bridge providing a control signal derived from the phase of the input supply. The circuit supplies a load with a voltage which is approximately continuous (Vout), deriving this an alternating supply (Vin) by rectification. The circuit includes a device (1') for extracting from the rectified voltage (Vr) information which is function of the variation in phase angle of the alternating input voltage. A diode (D) is provided to ensure that the output voltage (Vout) remains constant regardless of the phase of the input. Across the output terminals of the rectifier there is a capacitor (C), and a voltage divider bridge (R1, R2), delivering a low voltage which is proportional to the rectified voltage. An integration device (6) delivers a voltage (Vp) which has an analogue function of the phase angle of the supply. This is applied as an input to an energy conversion circuit (4), in order to regulate the final output.
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公开(公告)号:DE60205374D1
公开(公告)日:2005-09-08
申请号:DE60205374
申请日:2002-04-04
Applicant: ST MICROELECTRONICS SA
Inventor: BARDOUILLET MICHEL , WUIDART LUC
Abstract: The invention concerns an identification method and circuit ( 1 ) of the network type of parameters contained in an integrated circuit chip, comprising a single input terminal ( 2 ) for applying a signal (E) triggering an identification, the output terminals ( 3 1 , 3 2 , 3 i-1 , 3 i , 3 n-1 , 3 n ) adapted to deliver a binary identifying code (B 1 , B 2 , B i-1 , B i , B n-1 , B n ), first electrical paths P 1 , P 2 , P i , P n ), individually connecting said input terminal to each output terminal, and means ( 4, 5 1 , 5 2 , 5 i , 5 n ) for simultaneously integrating the binary states present in output of the electrical paths, each path inputting a delay sensitive to technological dispersions and/or of the integrated circuit fabrication method.
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公开(公告)号:DE60201023D1
公开(公告)日:2004-09-23
申请号:DE60201023
申请日:2002-04-04
Applicant: ST MICROELECTRONICS SA
Inventor: BARDOUILLET MICHEL , WUIDART LUC
Abstract: The invention concerns a circuit ( 1 ) for storing a binary code (B 1 , B 2 , Bi- 1 , Bi, Bn- 1 , Bn) in an integrated circuit chip, comprising an input terminal ( 2 ) applying a signal (E) triggering reading of the code, output terminals ( 31, 32, 3 i-1, 3 i, 3 n-1, 3 n) for delivering said binary code, first electrical paths (P 1 , P 2 , Pi, Pn) individually connecting said input terminal to each output terminal, each path inputting a fixed delay in the manufacture of the integrated circuit, and means ( 4, 51, 52, 5 i, 5 n) simultaneously integrating the binary states present in output of the electrical paths.
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公开(公告)号:FR2836749A1
公开(公告)日:2003-09-05
申请号:FR0201644
申请日:2002-02-11
Applicant: ST MICROELECTRONICS SA
Inventor: WUIDART LUC , MALHERBE ALEXANDRE , BARDOUILLET MICHEL
Abstract: The binary memory cell has two parallel branches. Each branch has a polycrystalline silicon programming resistor (Rp1,Rp2) connected to a terminal (1). There is a terminal point for a differential reading (4,6) of the memory state. There are switches (MNP1,MNP2) which during programming connect one of the read terminals to a second terminal (2).
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公开(公告)号:FR2792130B1
公开(公告)日:2001-11-16
申请号:FR9904547
申请日:1999-04-07
Applicant: ST MICROELECTRONICS SA
Inventor: WUIDART LUC , BARDOUILLET MICHEL , ENGUENT JEAN PIERRE
IPC: G08C17/00 , G01S13/75 , G01S13/76 , G01S13/79 , G06K7/00 , G06K17/00 , G06K19/07 , H02J17/00 , H04B1/59 , H04B7/14
Abstract: The transponder includes capacitor-transistor pairs (C3,K1,C4,K2) that produce an information when the transponder is close reading-writing terminal. The oscillating circuit of the transponder has a given frequency. The transmission of the information this position does not match since the frequency is higher than that of the oscillating circuit. An Independent claim is included for: (a) a system of data transmission
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公开(公告)号:FR2792135B1
公开(公告)日:2001-11-02
申请号:FR9904548
申请日:1999-04-07
Applicant: ST MICROELECTRONICS SA
Inventor: WUIDART LUC , BARDOUILLET MICHEL , ENGUENT JEAN PIERRE
Abstract: The coupling between transponder and terminal is reduced by altering the resonant frequency of either the terminal or transponder coupling circuits when the two are in close proximity. When the coupling is reduced, the data rate for the communication between terminal and transponder is automatically increased, which can be achieved because the coupling is effectively a transformer coupling.
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