公开(公告)号：US09508827B2

公开(公告)日：2016-11-29

申请号：US14918583

申请日：2015-10-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian-Cun Ke ,  Chih-Wei Yang ,  Chia-Fu Hsu

IPC: H01L21/782 ,  H01L29/66 ,  H01L29/78 ,  H01L29/51 ,  H01L29/49 ,  H01L21/265 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3115

CPC classification number: H01L29/66575 ,  H01L21/02532 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/28088 ,  H01L21/31155 ,  H01L29/4925 ,  H01L29/4966 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7833

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; forming a lightly doped drain in the substrate; and performing a first implantation process for implanting fluorine ions at a tiled angle into the substrate and part of the gate structure.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 在基板上形成栅极结构; 在衬底中形成轻掺杂漏极; 以及执行用于以平铺方式将氟离子注入所述衬底和所述栅极结构的一部分的第一注入工艺。

公开(公告)号：US09466727B1

公开(公告)日：2016-10-11

申请号：US14925984

申请日：2015-10-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Fu Hsu ,  Chun-Yuan Wu

IPC: H01L21/44 ,  H01L29/786 ,  H01L29/66 ,  H01L21/768 ,  H01L23/535 ,  H01L23/532

CPC classification number: H01L29/7869 ,  H01L21/76831 ,  H01L21/8258 ,  H01L23/485 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1207 ,  H01L29/66659 ,  H01L29/66969 ,  H01L29/7833 ,  H01L29/78648 ,  H01L29/78696

Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a metal-oxide-semiconductor (MOS) transistor, a plug, a hydrogen blocking layer and an oxide semiconductor (OS) structure. The MOS transistor is disposed on the substrate, and the plug is disposed on the MOS transistor to electrically connect thereto. The hydrogen blocking layer is disposed only on sidewalls of the plug, wherein the hydrogen blocking layer includes a high-k dielectric layer. The OS structure is disposed on the substrate, wherein the OS structure includes an oxide semiconductor layer.

Abstract translation: 半导体器件及其形成方法，半导体器件包括衬底，金属氧化物半导体（MOS）晶体管，插塞，氢阻挡层和氧化物半导体（OS）结构。 MOS晶体管设置在基板上，并且插头设置在MOS晶体管上以与其电连接。 氢阻挡层仅设置在插塞的侧壁上，其中氢阻挡层包括高k电介质层。 OS结构设置在基板上，其中OS结构包括氧化物半导体层。

公开(公告)号：US20160276224A1

公开(公告)日：2016-09-22

申请号：US14686787

申请日：2015-04-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tian Choy Gan ,  Chu-Yun Hsiao ,  Chia-Fu Hsu

IPC: H01L21/8238 ,  H01L21/265 ,  H01L27/092 ,  H01L29/66

CPC classification number: H01L27/0922 ,  H01L21/26513 ,  H01L21/82345 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/82385 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/66537 ,  H01L29/66545

Abstract: The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the substrate. The first transistor includes a first channel and a first work function layer. The second transistor includes a second channel and a second work function layer, where the first channel and the second channel include different dopants, and the second work function layer and the first work function layer have a same conductive type and different thicknesses.

Abstract translation: 本发明提供一种半导体器件及其形成方法。 半导体器件包括衬底，第一晶体管和第二晶体管。 第一晶体管和第二晶体管设置在基板上。 第一晶体管包括第一通道和第一功能层。 第二晶体管包括第二沟道和第二功函数层，其中第一沟道和第二沟道包括不同的掺杂剂，第二功函数层和第一功函数层具有相同的导电类型和不同的厚度。

公开(公告)号：US09406516B2

公开(公告)日：2016-08-02

申请号：US14680078

申请日：2015-04-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian-Cun Ke ,  Chih-Wei Yang ,  Kun-Yuan Lo ,  Chia-Fu Hsu ,  Shao-Wei Wang

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823828 ,  H01L21/823857 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7834

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming an interfacial layer on the substrate; forming a high-k dielectric layer on the interfacial layer; forming a first bottom barrier metal (BBM) layer on the high-k dielectric layer; performing a thermal treatment; removing the first BBM layer; and forming a second BBM layer on the high-k dielectric layer.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 在衬底上形成界面层; 在界面层上形成高k电介质层; 在高k电介质层上形成第一底部阻挡金属（BBM）层; 进行热处理; 去除第一个BBM层; 以及在所述高k电介质层上形成第二BBM层。

公开(公告)号：US20160093489A1

公开(公告)日：2016-03-31

申请号：US14499268

申请日：2014-09-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Feng Liu ,  Chih-Wei Yang ,  Jian-Cun Ke ,  Chia-Fu Hsu

IPC: H01L21/02 ,  H01L29/51

CPC classification number: H01L29/511 ,  H01L21/02175 ,  H01L21/02332 ,  H01L21/28185 ,  H01L21/3105 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6656

Abstract: A method of forming a dielectric layer includes the following steps. First of all, a high-k dielectric layer is formed on a substrate. Next, a nitridation process is performed on the high-k dielectric layer immediately after the high-k dielectric layer is formed. Then, a post-nitridation process is performed on the high-k dielectric layer after the nitridation process is performed.

Abstract translation: 形成介电层的方法包括以下步骤。 首先，在基板上形成高k电介质层。 接下来，在形成高k电介质层之后立即在高k电介质层上进行氮化处理。 然后，在进行氮化处理之后对高k电介质层进行氮化后处理。

公开(公告)号：US20160049497A1

公开(公告)日：2016-02-18

申请号：US14918583

申请日：2015-10-21

Applicant: United Microelectronics Corp.

Inventor： Jian-Cun Ke ,  Chih-Wei Yang ,  Chia-Fu Hsu

IPC: H01L29/66 ,  H01L21/3115 ,  H01L21/28 ,  H01L21/265

CPC classification number: H01L29/66575 ,  H01L21/02532 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/28088 ,  H01L21/31155 ,  H01L29/4925 ,  H01L29/4966 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7833

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; forming a lightly doped drain in the substrate; and performing a first implantation process for implanting fluorine ions at a tiled angle into the substrate and part of the gate structure.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 在基板上形成栅极结构; 在衬底中形成轻掺杂漏极; 以及执行用于以平铺方式将氟离子注入所述衬底和所述栅极结构的一部分的第一注入工艺。

公开(公告)号：US20160043195A1

公开(公告)日：2016-02-11

申请号：US14919738

申请日：2015-10-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Fu Hsu ,  Chun-Mao Chiou ,  Shih-Chieh Hsu ,  Jian-Cun Ke ,  Chun-Lung Chen ,  Lung-En Kuo

IPC: H01L29/49 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L29/495 ,  H01L21/28088 ,  H01L21/31116 ,  H01L29/4983 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate, a gate structure on the substrate, and a spacer adjacent to the gate structure, in which the bottom of the spacer includes a tapered profile and the tapered profile comprises a convex curve.

Abstract translation: 公开了一种半导体器件。 半导体器件包括衬底，衬底上的栅极结构和与栅极结构相邻的间隔物，其中间隔物的底部包括锥形轮廓，并且锥形轮廓包括凸曲线。

公开(公告)号：US20150332926A1

公开(公告)日：2015-11-19

申请号：US14280654

申请日：2014-05-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian-Cun Ke ,  Chih-Wei Yang ,  Chia-Fu Hsu

IPC: H01L21/28 ,  H01L29/66

CPC classification number: H01L29/7833 ,  H01L21/28211 ,  H01L21/28229 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/66568 ,  H01L29/6659

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; injecting a first precursor and forming an interfacial layer on the substrate; and injecting a second precursor and performing a thermal treatment for forming an interface layer on the interfacial layer.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 注入第一前体并在基底上形成界面层; 以及注入第二前体并进行用于在界面层上形成界面层的热处理。