최적화된 전장용 파워패키지
    51.
    发明公开
    최적화된 전장용 파워패키지 有权
    电气设备优化电源套件

    公开(公告)号:KR1020110029432A

    公开(公告)日:2011-03-23

    申请号:KR1020090087107

    申请日:2009-09-15

    Abstract: PURPOSE: An optimized power package for electrical devices is provided to enhance a freedom of design on a PCB(Printed Circuit Board) layer and an LTCC(Low Temperature Co-fired Ceramics) layer since the areas of the PCB layer and the LTCC layer are expanded. CONSTITUTION: An optimized power package for electrical devices comprises a two-stage housing(10), a PCB layer(20) and an LTCC layer(30). The housing is composed of upper and lower ends. Substrate layers are formed on the upper and lower ends of the housing, respectively. The PCB layer is formed on the lower end of the housing. The PCB layer comprises a path line for making current flow. The LTCC layer is formed on the upper end of the housing and is connected to the PCB layer by wire bonding. The LTCC layer is formed from LTCC.

    Abstract translation: 目的:提供电气设备的优化电源封装,以增强PCB(印刷电路板)层和LTCC(低温共烧陶瓷)层上的设计自由度,因为PCB层和LTCC层的面积为 扩大。 构成:用于电气设备的优化的功率封装包括两级壳体(10),PCB层(20)和LTCC层(30)。 外壳由上端和下端构成。 基板分别形成在壳体的上端和下端。 PCB层形成在壳体的下端。 PCB层包括用于产生电流的路径线。 LTCC层形成在壳体的上端,并通过引线接合连接到PCB层。 LTCC层由LTCC形成。

    얼라인 마크를 포함하는 저온 동시 소성 세라믹 기판
    52.
    发明公开
    얼라인 마크를 포함하는 저온 동시 소성 세라믹 기판 无效
    包含对准标记的低温合成陶瓷基板

    公开(公告)号:KR1020110028856A

    公开(公告)日:2011-03-22

    申请号:KR1020090086474

    申请日:2009-09-14

    Abstract: PURPOSE: A low temperature co-fired ceramic substrate comprising an alignment mark is provided to allow a person to identify the mounting direction of an external electronic element with the naked eye during a packaging process by comprising the alignment mark displaying a precise direction. CONSTITUTION: A low temperature co-fired ceramic substrate(10) comprises a plurality of electrode pads(20a, 20b) and an alignment mark(30). The alignment mark is formed on one of a plurality of electrode pads. An external connection terminal of the electronic element is mounted on the electrode pad and the alignment mark. The plurality of electrode pads is formed in a rectangular shape.

    Abstract translation: 目的:提供一种包括对准标记的低温共烧陶瓷基片,通过包括显示精确方向的对准标记,在包装过程中,人们可以用肉眼识别外部电子元件的安装方向。 构成:低温共烧陶瓷基板(10)包括多个电极焊盘(20a,20b)和对准标记(30)。 对准标记形成在多个电极焊盘之一上。 电子元件的外部连接端子安装在电极焊盘和对准标记上。 多个电极焊盘形成为矩形。

    세라믹 적층체 모듈 및 그 제조방법
    53.
    发明公开
    세라믹 적층체 모듈 및 그 제조방법 有权
    陶瓷元件和制造方法

    公开(公告)号:KR1020110002660A

    公开(公告)日:2011-01-10

    申请号:KR1020090060242

    申请日:2009-07-02

    Inventor: 황규만 이대형

    Abstract: PURPOSE: A ceramic stack module and a method for manufacturing the same are provided to improve the precision of the combination of a ceramic stack and a heat-sink by including a fixing unit. CONSTITUTION: A ceramic stack(110) comprises a plurality of lower insertion grooves(113a). An electronic component(120) is mounted at the lower side of the ceramic stack. The electronic component is an angle sensor. A heat sink(130) is combined with the lower side of the ceramic stack. The heat sink comprises a first through hole(131) and a second through hole(133). A fixing unit fixes the ceramic stack and the heat sink.

    Abstract translation: 目的:提供陶瓷堆叠模块及其制造方法,以通过包括固定单元来提高陶瓷堆叠和散热器组合的精度。 构成:陶瓷堆叠(110)包括多个下部插入槽(113a)。 电子部件(120)安装在陶瓷叠层的下侧。 电子部件是角度传感器。 散热器(130)与陶瓷堆叠的下侧组合。 散热器包括第一通孔(131)和第二通孔(133)。 固定单元固定陶瓷堆和散热片。

    렌즈 모듈
    54.
    发明授权
    렌즈 모듈 有权
    镜头模块

    公开(公告)号:KR100973005B1

    公开(公告)日:2010-07-30

    申请号:KR1020080076153

    申请日:2008-08-04

    CPC classification number: G02B7/022 G02B7/021

    Abstract: 본 발명은 구조가 간단하고, 렌즈의 형상변형이 발생하지 않으며, 적층되는 렌즈들 중에서 중심이탈이 발생한 렌즈를 용이하게 파악할 수 있어 광축정렬을 위한 렌즈의 위치보정을 용이하게 수행할 수 있는 렌즈 모듈을 제공한다.

    다연 노이즈저감 필터
    55.
    发明授权
    다연 노이즈저감 필터 有权
    다연노이즈저감필터

    公开(公告)号:KR100423399B1

    公开(公告)日:2004-03-18

    申请号:KR1020010068603

    申请日:2001-11-05

    Abstract: Disclosed herein is an array type noise reduction filter. The array type noise reduction filter has a plurality of noise reduction filters horizontally arranged within a single chip. A plurality of noise reduction filters each have an inductance portion, a ground portion, and a capacitance portion. The inductance portion is comprised of first and second coils approximately vertically connected in the chip. The ground portion is arranged over or under the inductance portion. The capacitance portion is arranged over or under the ground portion. A second coil of any inductance portion is constructed to be wound in a direction opposite to a second coil of another adjacent inductance portion.

    Abstract translation: 这里公开了一种阵列型降噪滤波器。 阵列型降噪滤波器具有多个水平排列在单个芯片内的降噪滤波器。 多个降噪滤波器各自具有电感部分,接地部分和电容部分。 电感部分由芯片中近似垂直连接的第一和第二线圈组成。 接地部分布置在电感部分之上或之下。 电容部分布置在接地部分之上或之下。 任何电感部分的第二线圈被构造成以与另一相邻电感部分的第二线圈相反的方向缠绕。

    쏘 듀플렉서 모듈
    56.
    发明公开
    쏘 듀플렉서 모듈 失效
    表面声波复用器模块

    公开(公告)号:KR1020020047431A

    公开(公告)日:2002-06-22

    申请号:KR1020000075821

    申请日:2000-12-13

    Inventor: 장병규 이대형

    Abstract: PURPOSE: An SAW(Surface Acoustic Wave) duplexer module is provided to minimize a restriction about a design due to a mounting of a duplexer by minimizing one direction width in composing the duplexer. CONSTITUTION: A first duplexer consists of a plate module which has a layer of ceramic sheet(100) and a constant electric property, an SAW filter(160) for receiving which is mounted on a filter mounting hole(130), and a lid which covers up the filter mounting hole(130). A second duplexer consists of a filter mounting hole which is opened downward, an SAW filter which is mounted in the filter mounting hole for a transmission, and a lid which covers an upper space. The first duplexer and the second duplexer are formed in a body.

    Abstract translation: 目的:提供SAW(表面声波)双工器模块,以通过最小化组成双工器的一个方向宽度来最小化由于双工器的安装而导致的设计限制。 构成:第一双工器由具有陶瓷片(100)层和恒定电性质的板模块组成,安装在过滤器安装孔(130)上的用于接收的SAW滤波器(160)和盖 覆盖过滤器安装孔(130)。 第二双工器由向下开口的过滤器安装孔,安装在用于变速器的过滤器安装孔中的SAW过滤器和覆盖上部空间的盖组成。 第一双工器和第二双工器形成在一体内。

    칩 부품
    57.
    发明公开
    칩 부품 无效
    芯片组件

    公开(公告)号:KR1020010057050A

    公开(公告)日:2001-07-04

    申请号:KR1019990058794

    申请日:1999-12-17

    Inventor: 박성열 이대형

    Abstract: PURPOSE: A chip component is provided to improve the mechanical reliability by enhancing the bond intensity between the internal electrode and the external electrode and to improve the electrical reliability and quality by using the internal electrode and the external electrode. CONSTITUTION: The chip component comprises a base sheet, a plurality of ceramic sheets laminated on the base sheet, a via hole(57) formed on the ceramic sheets, a plurality of internal electrodes(59) having at least one of turn, a plurality of dummy electrodes(61) formed on the ceramic sheet and electrically isolated from the electrode pattern formed on the internal electrode, an upper sheet(63) laminated on the ceramic sheet, and an external electrode(67) for wrapping the upper sheet, the base sheet, the dummy electrode, and the internal electrode. The internal electrodes are connected to upper part of the ceramic sheet through the via hole coated by the conductive material. The dummy electrode protrudes from the ceramic sheet.

    Abstract translation: 目的:提供一种芯片组件,通过增强内部电极和外部电极之间的结合强度来提高机械可靠性,并通过使用内部电极和外部电极来提高电气可靠性和质量。 构成:芯片部件包括基片,层叠在基片上的多个陶瓷片,形成在陶瓷片上的通孔(57),多个内部电极(59),其具有至少一个匝,多个 形成在陶瓷片上并与形成在内部电极上的电极图形电隔离的虚拟电极(61),层压在陶瓷片上的上片(63)和用于包裹上片的外部电极(67) 基片,虚拟电极和内部电极。 内部电极通过由导电材料涂覆的通孔连接到陶瓷片的上部。 虚拟电极从陶瓷片突出。

Patent Agency Ranking