公开(公告)号：KR1020010001258A

公开(公告)日：2001-01-05

申请号：KR1019990020357

申请日：1999-06-03

Applicant: 한국과학기술연구원

Inventor： 조재철 ,  최상삼 ,  김선호 ,  김상혁 ,  김동환 ,  김신근 ,  이재하

IPC: H03L7/00

Abstract: PURPOSE: An optical phase PLL(phase locked loop) is provided to keep an optical clock regular and to economize in cost and size. CONSTITUTION: An optical phase PLL includes an RF(radiofrequency) generator(104), an optical source(103), a VCO(voltage controlled oscillator,114), first/second control units(116,117), a down-converter mixer(115) and a pulse converter(110). The RF generator(104) generates a first RF signal and the optical source(103) outputs a clock optical pulse. The VCO(114) generates a second RF signal and the first control unit(116) converts optical waves into a first signal by filtering and amplifying. The down-converter mixer(115) converts the first/second RF signals down to a low-frequency signal and the pulse converter(110) changes the first signal and low-frequency signal into electric pulse signals respectively. The second control unit(117) outputs control voltage proportional to phase difference between the pulse signals. The VCO(114) is controlled by the control voltage to keep an optical clock regular.

Abstract translation: 目的：提供光锁相环（锁相环），以保持光学时钟的正常和节省成本和尺寸。 构成：光相位PLL包括RF（射频）发生器（104），光源（103），VCO（压控振荡器）114，第一/第二控制单元（116,117），下变频器混频器 ）和脉冲转换器（110）。 RF发生器（104）产生第一RF信号，并且光源（103）输出时钟光脉冲。 VCO（114）产生第二RF信号，第一控制单元（116）通过滤波和放大将光波转换成第一信号。 下变频混频器（115）将第一/第二RF信号转换为低频信号，并且脉冲转换器（110）分别将第一信号和低频信号改变成电脉冲信号。 第二控制单元（117）输出与脉冲信号之间的相位差成比例的控制电压。 VCO（114）由控制电压控制，以保持光时钟的正常。