Abstract:
The present invention relates to a digital pre-distortion apparatus. The digital pre-distortion apparatus comprises: an input delay unit which delays processing of input data as many as the order of a memory; a constant storing unit storing constant numbers of an polynomial expression corresponding to the order of the memory; a digital pre-distortion unit performing an operation using the input data through the input delay unit and the constant numbers of the polynomial expression corresponding to the order of the memory; and an addition unit storing an output of the digital pre-distortion unit, adding a number of the order of the memory to the output a time period of the order of the memory later, and outputting a result of the addition. According to the present invention, the digital pre-distortion apparatus can be implemented using hardware resources at the minimum. Thus, an increment in the hardware resources due to an extension of the order of the memory can be minimized when the digital pre-distortion apparatus considering memory effects is implemented.
Abstract:
본 발명은 전치 왜곡 장치와 방법에 관한 것으로, 더욱 상세하게는 전력 증폭기에서 출력되는 출력 신호의 왜곡을 최소화할 수 있는 전치 왜곡 장치와 방법에 관한 것이다. 본 발명은, 전력 증폭기의 전치 왜곡 장치에 있어서, 입력 신호의 크기를 계산하는 입력 신호 크기 계산부와, 상기 계산된 입력 신호의 크기를 양자화하고, 상기 양자화된 데이터를 미리 저장된 메모리 주소들 중 어느 하나의 메모리 주소에 매핑하여 상기 매핑된 메모리 주소를 출력하는 양자화 매퍼와, 상기 출력된 메모리 주소를 제공받아 상기 메모리 주소가 지시하는 복소 보정 계수와 바이어스 전압 값을 출력하는 룩업 테이블과, 상기 출력된 복소 보정 계수와 상기 입력 신호를 곱하여 전치 왜곡 신호를 생성하고, 상기 생성된 전치 왜곡 신호를 상기 전력 증폭기의 입력으로 제공하는 곱셈기를 구비하는 전치 왜곡부; 및 상기 전력 증폭기의 출력 신호와 상기 입력 신호를 비교하여 오차 신호를 생성하고, 상기 생성된 오차 신호의 크기가 최소가 되도록 상기 복소 보정 계수를 갱신하는 복소 보정 계수 갱신부를 포함하고, 상기 전치 왜곡부는, 상기 복소 보정 계수가 갱신되는 동안 상기 입력 신호의 크기에 해당하는 일정한 바이어스 전압 값을 상기 전력 증폭기의 바이어스로 제공한다.
Abstract:
PURPOSE: A digital pre-distortion device and a method thereof are provided to simultaneously achieve high-linearity and high-efficiency. CONSTITUTION: A DPD(Digital Pre-Distortion) algorithm execution unit(120) calculates the maximum output value and average output value of an output signal for an input signal of a power amplifier during a predetermined period. The DPD algorithm execution unit obtains the reversed function of the output function based on a reference value between an average input value and a maximum input value. A pre-compensation device(110) distorts a source input signal by using information corresponding to the reversed function of the output signal. The pre-compensation device inputs the pre-distortion signal as an input signal of the power amplifier. [Reference numerals] (110) Pre-compensation device; (112) Look-up table; (120) DPD algorithm execution unit
Abstract:
PURPOSE: A high efficiency envelope tracking amplifier, a method thereof, and a multi-level DC-DC converter for high efficiency envelope tracking amplifier are provided to reduce a ripple current generated from the DC-DC converter by using the DC-DC converter in multiple bits. CONSTITUTION: A baseband signal applying unit applies a baseband signal to a power amplifying unit. A signal converting unit detects an envelope signal from the baseband signal. The signal converting unit outputs a voltage according to a multilevel quantization signal by quantizing the detected envelope signal into a multiple level. A signal amplifying unit receives power from the signal amplifying unit. The signal amplifying unit amplifies the baseband signal inputted from the baseband signal applying unit. The signal converting unit quantizes the envelope signal to a K-bit(K>=2).
Abstract:
PURPOSE: A digital pre-distortion power amplifier and a method for digitally controlling synchronization thereof are provided to improve the non-linearity of an ET power amplifier by digitally pre-distorting signals of the ET power amplifier. CONSTITUTION: A power amplifier(930) amplifies input signals to be wirelessly transmitted through an antenna. A bias changing device(950) changes voltages of bias signals according to a size of the input signals. A digital pre-distorter(910) digitally controls the input signals of the power amplifier and the time delay of the bias signals. The digital pre-distorter controls the synchronization of the bias signals and the input signals. An ADC(940) controls the predistortion and synchronization of the power amplifier with a digital signal. A DAC(920) changes a predistortion output signal to an analog signal to be able to inputted into the power amplifier.
Abstract:
PURPOSE: An inlet distortion apparatus, inlet distortion method, system including the same are provided to constitute simplified memory polynomial models by combining basic sections according to feedback results for output signals of a non-linear apparatus. CONSTITUTION: An inlet distortion filter(1100) selects one or more basic sections of plural basic sections according to selecting values. The inlet distortion filter constitutes memory polynomial models. The inlet distortion filter distorts input signals by using the memory polynomial models. A selection module(1140) determines the selecting values according to feedback results for output signals of a non-linear apparatus(1200).
Abstract:
PURPOSE: A mobile communications system and a method controlling the mobile communications system are provided to reduce a call process time of a terminal to handoff. CONSTITUTION: A target base station(300) transmits bypass start information or bypass termination information to a relay(400) according to handoff request information received from a user terminal(100). The relay bypasses the burst transmission between the user terminal and the target base station according to the by-pass start information. The relay operates the communication between the user terminal and the target base station normally according to the by-pass termination information. A serving base station(200) receives the handoff request information from the user terminal.