Quadrature modulator and demodulator

    公开(公告)号:AU2028299A

    公开(公告)日:1999-07-26

    申请号:AU2028299

    申请日:1999-01-06

    Applicant: QUALCOMM INC

    Abstract: A quadrature modulator and demodulator which provide the requisite level of performance while minimizing power consumption. In the quadrature modulator, the I and Q signals are provided to two pairs of mixers. Each mixer in a pair of mixers modulates an I or Q signal with the respective inphase or quadrature IF sinusoid. The I and Q modulated signals from each pair of mixers are summed. The signals from the summers are provided to a third pair of mixer and modulated with the respective inphase and quadrature RF sinusoids. The signals from the third pair of mixers are summed and provided as the modulated signal. Using this quadrature modulator topology, the amplitude balance and phase error of the modulated signal are made insensitive to the amplitude imbalance and/or phase error of the quadrature splitters used to generate the IF and RF sinusoids. Furthermore, since the first two pairs of mixers and the two subsequent summers are operated at IF frequency, the performance requirements (e.g., bandwidth and linearity) of these components can be ensured while utilizing less power. The inventive concept can be further adopted for use in a quadrature demodulator.

    ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT
    52.
    发明申请
    ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT 审中-公开
    电子放电保护电路

    公开(公告)号:WO0229950A3

    公开(公告)日:2002-06-27

    申请号:PCT/US0142574

    申请日:2001-10-06

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    CPC classification number: H02H9/046

    Abstract: An arrangement for protecting an element from electro-static discharge. A switch is provided to inhibit the flow of energy through the element in response to the control signal. In the illustrative embodiment, the switch is a transistor switch. A resistor is disposed between an input terminal of the transistor and the positive supply to keep the transistor on during normal operation. A capacitor is disposed between the input terminal of the transistor and ground to prevent the input voltage of the transistor from fast changing. The RC time constant is chosen to be much larger than the time constant of the ESD pulse. Consequently, input voltage of the transistor will remain unchanged near OV and the transistor will remain off during ESD event preventing the element from conducting the discharge current and providing ESD protection.

    Abstract translation: 用于保护元件免受静电放电的装置。 提供开关以响应于控制信号来阻止通过元件的能量流动。 在说明性实施例中,开关是晶体管开关。 电阻器设置在晶体管的输入端和正电源之间,以在正常工作期间保持晶体管导通。 电容器设置在晶体管的输入端和接地之间,以防止晶体管的输入电压快速变化。 选择RC时间常数远大于ESD脉冲的时间常数。 因此,晶体管的输入电压在0V附近保持不变,并且在ESD事件期间晶体管将保持关断,从而防止元件进行放电电流并提供ESD保护。

    CURRENT SENSORS USING BIPOLAR TRANSISTORS
    53.
    发明公开

    公开(公告)号:EP3311159A1

    公开(公告)日:2018-04-25

    申请号:EP16733261

    申请日:2016-06-15

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for sensing. One example apparatus for sensing includes a sensor configured to supply a current indicative of a parameter and a bipolar transistor having a base coupled to the sensor to receive the current, the bipolar transistor being configured to generate an amplified current based on the current. The apparatus may also include a measurement circuit coupled to the bipolar transistor and configured receive the amplified current.

    55.
    发明专利
    未知

    公开(公告)号:BRPI0809126A2

    公开(公告)日:2014-08-26

    申请号:BRPI0809126

    申请日:2008-03-21

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: This disclosure describes techniques for reducing adverse effects of TX signal leakage in a full-duplex, wireless communication system. In particular, the disclosure describes techniques for reducing adverse effects of second order distortion of TX signal leakage. To reduce or eliminate second order distortion of transmit signal leakage, a wireless device squares a combined signal that carries both a desired RX signal and a TX leakage signal. For example, the device may include a device that exhibits a strong, second order nonlinearity to, in effect, square the combined signal. The device subtracts the squared signal from the output of the mixer in the receive path, canceling out at least some of the second-order distortion caused by the mixer. In this manner, the device can reduce the adverse effects of second order distortion of TX signal leakage, and thereby enhance or maintain receiver sensitivity.

    ПОДАВЛЕНИЕ УТЕЧКИ ПЕРЕДАВАЕМОГО СИГНАЛА В УСТРОЙСТВЕ БЕСПРОВОДНОЙ СВЯЗИ

    公开(公告)号:RU2440673C2

    公开(公告)日:2012-01-20

    申请号:RU2009139640

    申请日:2008-03-25

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: Изобретениеотноситсяк беспроводнойсвязи, аболееконкретнок способамсниженияотрицательноговоздействияутечкипередаваемогосигналав системеполнодуплекснойбеспроводнойсвязи. Достигаемыйтехническийрезультат - снижениеотрицательноговоздействияискажениявторогопорядкаи искаженияотперекрестноймодуляцииутечкисигналаотпередающегоустройства. Техническийрезультатдостигаетсязасчетприемапринимаемого (RX) входного RF-сигнала, имеющегосигналТХ-утечки; вычитанияоценкисигналаТХ-утечкиизвходногосигналаи формированияоценкисигналаТХ-утечки, невключающегов себясобственноТХ-сигнал, наосновевыходногосигналаи немодулированногоопорногосигналананесущейчастотесигналаТХ-утечки. 4 н. и 43 з.п. ф-лы, 12 ил.

    AMPLIFICADOR CON LINEALIZACION POST-DISTORSION ACTIVA.

    公开(公告)号:ES2370800T3

    公开(公告)日:2011-12-22

    申请号:ES06789089

    申请日:2006-07-31

    Applicant: QUALCOMM INC

    Abstract: Un circuito integrado que comprende: un primer transistor (310; 810) acoplado eléctricamente con su fuente a un inductor (350; 850) y operativo para recibir y amplificar una señal de entrada (v1); un segundo transistor (320; 820) acoplado eléctricamente al primer transistor (310; 810) y operativo para generar una señal intermedia y proporcionar una señal de salida, y un tercer transistor (330, 830) acoplado eléctricamente al segundo transistor (320, 820) y operativo para recibir la señal intermedia y generar componentes de distorsión utilizados para anular una componente de distorsión generada por el primer transistor (310, 810).

    58.
    发明专利
    未知

    公开(公告)号:FI121044B

    公开(公告)日:2010-06-15

    申请号:FI19992295

    申请日:1999-10-22

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: An active phase splitter comprises two or more phase shift circuits. Each phase shift circuit comprises a number of active devices and capacitors. For a single-pole active phase splitter, within each phase shift circuit, two active devices are configured as a cascode amplifier. The first active device is configured as a common source amplifier and the second active device is configured as a common gate amplifier. A capacitor is connected across the gate and drain of the first active device to generates the necessary pole-zero pair for the phase shift circuit. The cascode configuration results in the desired transfer function and provides transconversion of voltage input to current outputs. Active phase splitters with two or more poles can be built using the same inventive concept.

    59.
    发明专利
    未知

    公开(公告)号:DE60138837D1

    公开(公告)日:2009-07-09

    申请号:DE60138837

    申请日:2001-10-31

    Applicant: QUALCOMM INC

    Abstract: A radio frequency amplifier with improved linearity and minimal third-order distortion. The amplifier includes a first transistor having first, second and third terminals with the first terminal being an input terminal and the second terminal being the output terminal and the third terminal being a common terminal. A linearization circuit is included having first and second terminals. The first terminal is connected to the common terminal of the transistor and the second terminal is connected to the input terminal of the transistor. In a specific embodiment, the linearization circuit is implemented as a unity gain buffer with an input terminal connected to the common terminal of the transistor and an output terminal connected to the input terminal of the transistor. In accordance with the inventive teachings, the buffer has a low gain and high output impedance at first frequency (f1) of a first signal applied to the circuit and a second frequency (f2) of a second signal applied to the circuit and a unity gain and low output impedance a difference between the first and second frequencies. In another specific embodiment, the inductor is inserted between the output of the unity gain buffer and the input terminal of the transistor. In alternative embodiments, circuitry is shown for providing a direct current offset at the input of the transistor. As another alternative, the linearization circuit consists of series inductor and capacitor connected between the common and input terminals of the transistor. In yet another embodiment, the linearization circuit consists of the first and the second series inductor and capacitor circuits. The first series LC circuit is connected between the common terminal of the transistor and ground and the second series LC circuit is connected between the input terminal of the transistor and ground.

    REDUCTION OF SECOND-ORDER DISTORTION CAUSED BY TRANSMIT SIGNAL LEAKAGE

    公开(公告)号:CA2679576A1

    公开(公告)日:2008-10-02

    申请号:CA2679576

    申请日:2008-03-21

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: This disclosure describes techniques for reducing adverse effects of TX s ignal leakage in a full-duplex, wireless communication system. In particular , the disclosure describes techniques for reducing adverse effects of second order distortion of TX signal leakage. To reduce or eliminate second order distortion of transmit signal leakage, a wireless device squares a combined signal that carries both a desired RX signal and a TX leakage signal. For ex ample, the device may include a device that exhibits a strong, second order nonlinearity to, in effect, square the combined signal. The device subtracts the squared signal from the output of the mixer in the receive path, cancel ling out at least some of the second-order distortion caused by the mixer. I n this manner, the device can reduce the adverse effects of second order dis tortion of TX signal leakage, and thereby enhance or maintain receiver sensi tivity.

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