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公开(公告)号：AU5635994A
公开(公告)日：1994-09-15
申请号：AU5635994
申请日：1994-02-25
Applicant: SONY CORP
Inventor： SUZUKI HIROSHI , AKAGIRI KENZO , SHIMOYOSHI OSAMU , MITSUNO MAKOTO
Abstract: A device for recording and/or reproducing or transmitting and/or receiving compressed data includes decoding circuits (31 to 33) for performing expansion during the compression process. An error produced during the compression process is calculated by an input/output error calculating circuit (41) from the input data and data compressed by adaptive bit allocation encoding circuits (22 to 24) and expanded by the decoding circuits to and bit allocation is again calculated on the basis of the error produced during the compression process, with the input data remaining as it is. The bit allocation re-calculated in this manner is quantized by the encoding circuits (22 to 24). Also, data annulling the error produced during the compression process is formulated by the input/output error calculating circuit (41) and summed to the input signals for subsequent quantization. Compressed signals suited to the input signals may be obtained even if the model for the auditory sense or constants occasionally employed are not suited to the input signals, or if the input signals are unanticipated signals.
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公开(公告)号：BR9204820A
公开(公告)日：1993-07-13
申请号：BR9204820
申请日：1992-03-27
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号：ZA921988B
公开(公告)日：1993-02-24
申请号：ZA921988
申请日：1992-03-18
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , KYOYA TSUTSUI , SHIMOYOSHI OSAMU , OSAMU SHIMOYOSHI
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号：CA2083713A1
公开(公告)日：1992-09-30
申请号：CA2083713
申请日：1992-03-27
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: 2083713 9217884 PCTABS00016 Input digital data are arranged into blocks by plural samples and orthogonal transform is effected in each block to produce coefficient data, which are encoded with an adaptive number of bits. A plurality of orthogonal transform units transform the input digital data with different block lengths. Only one of outputs is selected on the basis of outputs of the orthogonal transform units. The apparatus includes a block length decision circuit for determining the block length for orthogonal transform of each band based on characteristics of block data prior to orthogonal transform of each band. Orthogonal transform of each band is effected with the block length determined by the block length decision circuit. The encoding apparatus also includes a unit for frequency analyzing input digital data, a noise level setting unit for finding energies for each block consisting of plural output data from the frequency analyzing unit and setting the tolerable noise level based on the energies on the block-by-block basis, a unit for calculating floating coefficients based on the maximum value data in each block consisting of plural output data from the frequency analyzing unit, unit for encoding outputs of the frequency analyzing unit, and an allocation bit number decision circuit for finding the number of allocated bits at the time of encoding by the encoding unit based on an output of the noise level setting unit and an output of the floating coefficient calculating unit.
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公开(公告)号：DE60039279D1
公开(公告)日：2008-08-07
申请号：DE60039279
申请日：2000-12-06
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , SHIMOYOSHI OSAMU , HONMA HIROYUKI , MIYAZAKI SATOSHI
Abstract: A first codec-based warning message generator 151 generates a warning message by a first. A first codec-based silent fixed pattern generator 152 generates a first codec-based silent fixed pattern. A second codec encode block 154 encodes an input signal by a second codec. A code string generator 155 generates a synthetic code string by synthesizing outputs from the above components in an encoding frame having a predetermined length being a unit of encoding.
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Patent Agency Ranking
公开(公告)号：AT362168T
公开(公告)日：2007-06-15
申请号：AT98105440
申请日：1998-03-25
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: An encoding method and apparatus and a decoding method and apparatus in which the encoded information is decreased in volume and in which the encoding and decoding operations are performed with a smaller processing volume and a smaller buffer memory capacity. The apparatus includes a low range signal splitting circuit (261g, 261h) for separating low-range side signal components (260c,260d) from L and R channel signals (260a,260b) converted by a transform circuit into spectral signal components, and a channel synthesis circuit (261e) for synthesizing (L+R) channel signal components from the L and R channel spectral signal components (260c,260d). The apparatus also includes a high range signal separating circuit (261f) for separating the high range side signal components (260h) from the (L+R) channel signal components (260a,260b), a signal component encoding circuit (261j,261k) for compression-encoding low-range side signal components and a signal component encoding circuit (261i) for compression-encoding the normalization coefficient information obtained on normalization of the (L+R) channel high-range signal components.
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公开(公告)号：DE69635973T2
公开(公告)日：2006-11-09
申请号：DE69635973
申请日：1996-11-08
Applicant: SONY CORP
Inventor： SHIMOYOSHI OSAMU , TSUTSUI KYOYA
Abstract: Coding (2) of a high efficiency is achieved without increasing the scale of a code train transform table (1). Quantization spectra are divided into groups, and when two quantization spectra in any group are both equal to 0, they are coded (2) into 0. If the two quantization spectra are not equal to 0, the values (-2, 3) of the individual quantization spectra are coded (2) into corresponding values (1101, 1110) and 1 is added to the top of the code train (3).
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公开(公告)号：MY122169A
公开(公告)日：2006-03-31
申请号：MYPI9801345
申请日：1998-03-26
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: AN ENCODING METHOD AND APPARATUS AND A DECODINGS METHOD AND APPARATUS IN WHICH THE ENCODED INFORMATION IS DECREASED IN VOLUME AND IN WHICH THE ENCODING AND DECODING OPERATIONS ARE PERFORMED WITH A SMALLER PROCESSING VOLUME AND A SMALLER BUFFER MEMORY CAPACITY. THE APPARATUS INCLUDES A LOW RANGE SIGNAL SPLITTING CIRCUIT (261G,261H) FOR SEPARATING LOW-RANGE SIDE SIGNAL COMPONENTS (260C,260D) FROM LAND R CHANNEL SIGNALS (260A,260B) CONVERTED BY A TRANSFORM CIRCUIT INTO SPECTRAL SIGNAL COMPONENTS, AND A CHANNEL SYNTHESIS CIRCUIT (261E) FOR SYNTHESIZING (L+R) CHANNEL SIGNAL COMPONENTS FROM THE L AND R CHANNEL SPECTRAL SIGNAL COMPONENTS (260C,260D). THE APPARATUS ALSO INCLUDES A HIGH RANGE SIGNAL SEPARATING CIRCUIT (261F) FOR SEPARATING THE HIGH RANGE SIDE SIGNAL COMPONENTS (260H) FROM THE (L+R) CHANNEL SIGNAL COMPONENTS (260A,260B), A SIGNAL COMPONENT ENCODING CIRCUIT (261J,261K) FOR COMPRESSION-ENCODING LOW-RANGE SIDE SIGNAL COMPONENTS AND A SIGNAL COMPONENT ENCODING CIRCUIT (261I) FOR COMPRESSION-ENCODING THE NORMALIZATION COEFFICIENT INFORMATION OBTAINED ON NORMALIZATION OF THE (L+R) CHANNEL HIGH-RANGE SIGNAL COMPONENTS.
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公开(公告)号：DE69534273T2
公开(公告)日：2006-03-23
申请号：DE69534273
申请日：1995-04-03
Applicant: SONY CORP
Inventor： TSUTSUI KYOYA , SONOHARA MITO , SHIMOYOSHI OSAMU
Abstract: Time-series sampled data of the input signal are grouped (SO1); the data are converted into spectrum data by MDCT (SO2); in order to divide the spectrum data into units, a code table is selected for every unit (SO6); the spectrum data are encoded by quantization using the code tables (SO8); and the encoded spectrum data, the identification signals of the code tables, the normalization coefficients and the number of steps of quantization are outputted (SO9). It is also possible to select a code table for every frame. Thus, the hardware scale of the encoder can be effectively reduced and the encoding efficiency of the encoder can be effectively improved.
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公开(公告)号：DE69434225T2
公开(公告)日：2005-12-08
申请号：DE69434225
申请日：1994-03-09
Applicant: SONY CORP
Inventor： SHIMOYOSHI OSAMU , AKAGIRI KENZO , SUZUKI HIROSHI , MITSUNO MAKOTO
Abstract: A technique for recording, reproducing, transmitting and/or receiving compressed data utilizes frequency dividing filters (101, 102) for dividing the frequency range of digital signals into plural frequency bands, orthogonal transform circuits (103-105) for producing signal components in plural two-dimensional blocks along time and frequency, an adaptive bit allocation and encoding circuit (108) for quantizing and compressing the information for each two-dimensional block, and a bit allocation and calculating circuit (107). When recording the information together with information compressing parameters for each two-dimensional block, the information compressing parameters for at least two two-dimensional blocks are recorded collectively to avoid complexity in the structure of the sampling frequency signal generating circuits or the like that would otherwise be caused in the case of providing plural sampling frequencies, as well as to prevent an increase in hardware scale.
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