Method and apparatus for encoding a binary data stream into a binary code stream
    51.
    发明公开
    Method and apparatus for encoding a binary data stream into a binary code stream 失效
    将二进制数据流编码为二进制代码流的方法和装置

    公开(公告)号:EP0122083A3

    公开(公告)日:1987-04-22

    申请号:EP84302122

    申请日:1984-03-28

    Inventor: Endoh, Naoki

    CPC classification number: G11B20/1426

    Abstract: In an encode method in which a binary data stream is divided into data words each of three bits. Each of the data words is encoded into a binary code word of 9 bits. In the method, a code word to be encoded is encoded in consideration of a code word preceding the code word and two code words succeeding the code word. Then, one of the first two code bits in each code word and two of the last five code bits in the preceeding code word are inverted according to a pattern of code bits «0» and «1» in both the code words. As a result, consecutive 5 to 19 code bits «0» are arrayed between two adjacent code bits «1» in the code word stream.

    Information recording system
    53.
    发明公开
    Information recording system 失效
    信息记录系统

    公开(公告)号:EP0127732A3

    公开(公告)日:1987-01-07

    申请号:EP84102490

    申请日:1984-03-08

    Applicant: HITACHI, LTD.

    Abstract: An information recording method and system for writing information onto a recording medium. If an error area is detected in a check of the information read out of the medium after writing, the information is rewritten onto an alternative area on the recording medium using a buffer memory (34), while the information in the error area is kept valid. Loss time for accessing the alternative area is eliminated until the error checking and correction in the error checking and correction circuit (38) is not available for the information read out of the error area through a reading circuit (31, 32).

    Disk drive system
    54.
    发明公开
    Disk drive system 失效
    磁盘驱动系统

    公开(公告)号:EP0126610A3

    公开(公告)日:1986-12-17

    申请号:EP84303268

    申请日:1984-05-15

    CPC classification number: G06F3/0601 G06F2003/0692

    Abstract: The system comprises a controller connected to a disk drive or drives by a bus including data lines and various control and handshaking lines. One line effects a CONTROL/DATA selection so that the drive knows whether codes sent on the data lines are disk data or drive control instructions. Another line effects a HEADER/DATA selection to distinguish the header and data portions of a disk sector. The controller includes a microprocessor (1911) with a register (1969) holding an expected header EHDR, a register (1967) holding the number SCOUNT of sectors to be read or written and a register (1965) holding the number of codes in a sector. in a read or write operation a signal CTLIDDCA from a sequencer (1945) select HEADER and a receiver, selected by a sequencer signal DP/INT, puts received codes on to a data bus (1913). The microprocessor (1911) receives sector headers in this way until there is a match, whereupon a signal CSIGS is given to the sequencer (1945) which causes CTL/DDCA to select DATA and DP/INT to enable the data receiver or driver depending upon whether the operation is read or write. The codes are counted down by decrementing DCOUNT. When DCOUNT = 0 (end of sector) SCOUNT is decremented and another signal CSIGS causes the sequencer to revert to the conditions for looking for the next expected header which is calculated by the microprocessor and entered in EHDR. Where SCOUNT reaches 0 the read or write operation is complete.

    Apparatus for decoding phase encoded data
    57.
    发明公开
    Apparatus for decoding phase encoded data 失效
    用于解码相位编码数据的装置

    公开(公告)号:EP0119445A3

    公开(公告)日:1985-12-04

    申请号:EP84101376

    申请日:1984-02-10

    CPC classification number: G11B20/1419

    Abstract: Apparatus is disclosed for reading phase encoded digital data from a nine-track magnetic tape which apparatus includes timing circuitry for deriving a clock signal from the recorded data. A portion of the timing circuitry is associated with each track on the tape and automatically accomodates, without generating errors, phase changes in the derived clock signal in that track caused by speed variations in the magnetic tape transport and due to bit shifts caused by certain data patterns. Tape transport speed variations are sensed and the derived clock rate is corrected by a digital phase-locked loop which uses a counter that is clocked at a constant rate to determine the timing "window" during which the circuitry looks for signal transitions on the magnetic tape. A running average of the count remaining in the counter at the time when a transition actually occurs is used to adjust the counter starting value until equilibrium is established. The circuitry accomodates clock signal phase changes caused by bit shifting by calculating an expected arrival time for a data transition and varying the width of the timing window depending on whether the data transition is received either prior to or subsequent to the expected arrival time.

    A method for recording data on a magnetic recording medium
    58.
    发明公开
    A method for recording data on a magnetic recording medium 失效
    用于记录磁记录介质上的数据的方法

    公开(公告)号:EP0093200A3

    公开(公告)日:1985-08-14

    申请号:EP82111445

    申请日:1982-12-10

    CPC classification number: G11B5/5965 G11B5/02 G11B5/03

    Abstract: A method for recording high frequency signals representing data with simultaneous readout of low frequency information, such as servo information prerecorded on a magnetic disk (22), comprises the step of modulating (12) with the data (14) a carrier signal (10) having a repetition frequency displaced significantly from the baseband of the data. The nonlinearity of the recording channel shifts the modulated signal spectrum into the low frequency baseband so that the data is magnetically recorded while the low frequency prerecorded information is read out.

    Hierarchical storage systems adapted for error handling
    60.
    发明公开
    Hierarchical storage systems adapted for error handling 失效
    适用于错误处理的分层存储系统

    公开(公告)号:EP0073330A3

    公开(公告)日:1984-05-16

    申请号:EP82106400

    申请日:1982-07-16

    CPC classification number: G11C29/70 G11B20/1883 G11B2220/20

    Abstract: Data associated with a defective area (18) of a backing store (13) and stored in an alternate area (25), such as defective and alternate tracks in a direct access storage device, is pinned to a high speed buffer front store (14) based upon usage for such data. A first replacement control governs buffer operation for data from good areas of the backing store and a second independent replacement control governs buffer operation for data from alternate storage areas. Limitations are imposed on the amount of data subject to the second replacement control.

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