公开(公告)号：WO1992020160A1

公开(公告)日：1992-11-12

申请号：PCT/US1992003512

申请日：1992-04-28

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  MATTHEWS, James, A. ,  ROSSEEL, Geert

IPC: H03K17/16

CPC classification number: H03K19/09448

Abstract: A BiCMOS logic circuit (20) utilizes an emitter-coupled pair of bipolar transistors (21, 22) for differentially comparing an input signal (VIN) with a logic reference level (VBIAS). Each of the bipolar transistors are resistively loaded by a p-channel metal-oxide-semiconductor (PMOS) transistor (26, 27). An emitter follower (33 or 34), having its base coupled to the collector of one of the bipolar transistors and its collector connected to the first power supply potential (GND), provides the output signal. NMOS transistors (24, 36, 37) are used as current sources for biasing the emitter-coupled pair and the emitter follower. A circuit means provides a feedback signal coupled to the gates of the PMOS transistors for dynamically controlling the load resistance presented to said emitter coupled pair.

公开(公告)号：WO1991020084A1

公开(公告)日：1991-12-26

申请号：PCT/US1991004085

申请日：1991-06-10

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  MATTHEWS, James, A.

IPC: G11C13/06

CPC classification number: G11C11/18 ,  G02F1/09 ,  G02F1/19 ,  G11C7/005 ,  G11C13/04

Abstract: An optical modulator utilizing a magnetic semiconductor device, whose operation is based on the Hall effect, includes a magnetic material (33) formed on a semiconductor substrate (27). When an incoming beam of light (105) having a dominant polarization direction is directed onto the magnetic material (33) it becomes modulated. The result is an outgoing beam of light (106) which has a rotated plane of polarization when compared to the dominant polarization direction. The direction of the rotated plane of polarization is indicative of the information stored in the magnetic material (33). The modulator of the present invention further includes a means for writing the information to the magnetic material and a semiconductor sensor means (35) for electrically verifying the contents of the magnetic material (33).

公开(公告)号：WO1991011006A1

公开(公告)日：1991-07-25

申请号：PCT/US1991000331

申请日：1991-01-16

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  MATTHEWS, James, A.

IPC: G11C11/18

CPC classification number: G11C11/18

Abstract: A non-volatile, static magnetic memory device (10), whose operation is based on the Hall effect, is disclosed. The device includes a magnetic patch (33) which stores data in the form of a magnetic field, a semiconductor Hall bar (14, 15, and 17) and a pair of integrally-formed bipolar transistors (28 and 29) used for amplifying and buffering the Hall voltage produced along the Hall bar. Current is forced to flow down the length of the Hall bar causing a Hall voltage to be developed in a direction transverse to the direction of both the magnetic field and the current. The bases (18 and 19) of the bipolar transistors (28 and 29) are ohmically coupled to the Hall bar to sense the Hall voltage, the polarity of which is representative of the stored information. A system of current carrying conductors is employed for writing data to individual magnetic patches.

公开(公告)号：AU7595596A

公开(公告)日：1997-04-30

申请号：AU7595596

申请日：1996-10-10

Applicant: MICROUNITY SYSTEMS ENGINEERING INC

Inventor： HANSEN CRAIG C

IPC: G06F12/02 ,  G06F12/10 ,  G06F12/14 ,  G06F19/00

Abstract: A virtual memory system including a local-to-global virtual address translator for translating local virtual addresses having associated task specific address spaces into global virtual addresses corresponding to an address space associated with multiple tasks, and a global virtual-to-physical address translator for translating global virtual addresses to physical addresses. Protection information is provided by each of the local virtual-to-global virtual address translator, the global virtual-to-physical address translator, the cache tag storage, or a protection information buffer depending on whether a cache bit or miss occurs during a given data or instruction access. The cache is configurable such that it can be configured into a buffer portion or a cache portion for faster cache accesses.

公开(公告)号：AU1756692A

公开(公告)日：1992-11-02

申请号：AU1756692

申请日：1992-03-31

Applicant: MICROUNITY SYSTEMS ENGINEERING INC

Inventor： JAMES A MATTHEWS

IPC: F28F3/04 ,  F28F3/12 ,  H01L23/473

公开(公告)号：AU3786193A

公开(公告)日：1993-09-13

申请号：AU3786193

申请日：1993-02-23

Applicant: MICROUNITY SYSTEMS ENGINEERING INC

Inventor： ROSSEEL GEERT ,  HERNDON WILLIAM H ,  MATTHEWS JAMES A

IPC: H03K19/003 ,  H03K17/14 ,  H03K17/567 ,  H03K17/60 ,  H03K19/08 ,  H03K19/086 ,  H03K19/0944 ,  H03K17/16

Abstract: An improved BiCMOS logic circuit utilizes an emitter-coupled pair of bipolar transistors for differentially comparing an input signal with a logic reference level. Each of the bipolar transistors are resistively loaded by a network of p-channel metal-oxide-semiconductor (PMOS) transistors coupled in parallel. At least one of the parallel combination of transistors has its gate coupled to a control signal providing a variable load resistance. The control signal is preferably provided by a feedback network which maintains a constant voltage swing across the network over temperature.

公开(公告)号：AU1906692A

公开(公告)日：1992-12-21

申请号：AU1906692

申请日：1992-04-28

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： JAMES A MATTHEWS ,  GEERT ROSSEEL

IPC: H03K17/567 ,  H03K19/08 ,  H03K19/086 ,  H03K19/0944

公开(公告)号：AU8005091A

公开(公告)日：1992-01-07

申请号：AU8005091

申请日：1991-06-10

Applicant: MICROUNITY SYSTEMS ENGINEERING INC

Inventor： MATTHEWS JAMES A

IPC: G02F1/09 ,  G02F1/19 ,  G11B11/00 ,  G11B11/10 ,  G11B11/105 ,  G11C7/00 ,  G11C11/18 ,  G11C13/04 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/105 ,  H01L29/788 ,  H01L29/792 ,  H01L43/06 ,  H01S3/10 ,  G11C13/06

Abstract: An optical modulator utilizing a magnetic semiconductor device, whose operation is based on the Hall effect, includes a magnetic material formed on a semiconductor substrate. When an incoming beam of light having a dominant polarization direction is directed onto the magnetic material it becomes modulated. The result is an outgoing beam of light which has a rotated plane of polarization when compared to the dominant polarization direction. The direction of the rotated plane of polarization is indicative of the information stored in the magnetic material. The modulator of the present invention further includes a means for writing the information to the magnetic material and a semiconductor sensor means for electrically verifying the contents of the magnetic material.

公开(公告)号：AU3478793A

公开(公告)日：1993-08-03

申请号：AU3478793

申请日：1993-01-15

Applicant: MICROUNITY SYSTEMS ENGINEERING INC

Inventor： CHEN JANG FUNG ,  MATTHEWS JAMES A

IPC: G03F1/00 ,  G03F1/36 ,  G03F7/20 ,  G03F9/00 ,  H01L21/027

Abstract: An improvement for reducing proximity effects comprised of additional lines, referred to as intensity leveling bars, into the mask pattern. The leveling bars perform the function of adjusting the edge intensity gradients of isolated edges in the mask pattern, to match the edge intensity gradients of densely packed edges. Leveling bars are placed parallel to isolated edges such that intensity gradient leveling occurs on all isolated edges of the mask pattern. In addition, the leveling bars are designed to have a width significantly less than the resolution of the exposure tool. Therefore, leveling bars that are present in the mask pattern produce resist patterns that completely developed away when a nominal exposure energy is utilized during exposure of photoresist.

公开(公告)号：AU1746795A

公开(公告)日：1995-08-29

申请号：AU1746795

申请日：1995-02-09

Applicant: MICROUNITY SYSTEMS ENGINEERING INC

Inventor： CHEN JANG FUNG ,  MATTHEWS JAMES A

IPC: G03F1/00 ,  G03F7/20

Abstract: A mask 206 for use in an apparatus utilized for optically transferring a lithographic pattern corresponding to an integrated circuit from said mask 206 onto a semiconductor substrate, said apparatus utilizing off-cases illumination, said pattern including at least one feature, said mask 206 comprising: an additional feature 215, 216 adjacent to and surrounding said at least one feature, said additional feature 215, 216 being disposed at a predetermined distance from all edges of said at least one feature and having the same transparency as said at least one feature, the width of said additional feature 215, 216 being selected such that the depth of focus of said at least one feature is increased.