公开(公告)号：US20160107884A1

公开(公告)日：2016-04-21

申请号：US14977465

申请日：2015-12-21

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Kevin Formosa

IPC: B81B7/00 ,  B81C1/00 ,  H04R31/00 ,  H04R19/00 ,  H04R19/04

CPC classification number: B81B7/0074 ,  B81B7/0061 ,  B81B2201/0257 ,  B81B2207/012 ,  B81C1/00309 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4824 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00 ,  H04R2201/003 ,  H01L2924/00014

Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.

公开(公告)号：US20150235929A1

公开(公告)日：2015-08-20

申请号：US14615673

申请日：2015-02-06

Applicant: STMicroelectronics (Malta) Ltd ,  STMicroelectronics S.r.I. ,  STMicroelectronics Pte Ltd

Inventor： Roseanne Duca ,  Valter Motta ,  Xueren Zhang ,  Kim-Yong Goh

IPC: H01L23/495

CPC classification number: H01L23/49568 ,  H01L23/4334 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2924/18301 ,  H01L2924/00014

Abstract: An electronic device includes an integrated circuit chip mounted to a heat slug. The heat slug has a peripheral region having first thickness along a first direction, the peripheral region surrounding a recess region (having a second, smaller, thickness along the first direction) that defines a chip mounting surface along a second direction perpendicular to the first direction. The recess region defines side borders and a nook extends into the heat slug along the side borders. An insulating body embeds the integrated circuit one chip and heat slug. Material of the insulating body fills the nook.

Abstract translation: 一种电子设备包括安装在散热片上的集成电路芯片。 散热片具有沿着第一方向具有第一厚度的周边区域，周边区域围绕沿着垂直于第一方向的第二方向限定芯片安装表面的凹陷区域（具有沿着第一方向的第二较小厚度） 。 凹槽区域限定侧面边界，并且角部沿着侧边缘延伸到热塞中。 绝缘体嵌入集成电路一芯片和散热片。 绝缘体的材料填充角。

公开(公告)号：US20140091443A1

公开(公告)日：2014-04-03

申请号：US14032075

申请日：2013-09-19

Applicant: STMicroelectronics Pte Ltd ,  STMicroelectronics (Malta) Ltd

Inventor： Roseanne Duca ,  Kim-Yong Goh ,  Xueren Zhang ,  Kevin Formosa

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L23/49541 ,  G01P1/023 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/1815 ,  H05K3/303 ,  H05K3/3421 ,  H05K2201/09781 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/01005 ,  H01L2224/45099

Abstract: A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package.

Abstract translation: 半导体器件的表面贴装封装具有：封装，容纳至少一个包含半导体材料的管芯; 以及电接触引线，从封装凸出以电耦合到电路板的接触焊盘; 封装具有设计成面向电路板的顶表面的主面，该主面具有设计成用于机械耦合到电路板的耦合特征，以增加安装封装的谐振频率。 耦合特征设想至少一个第一耦合凹槽，其限定在从主面开始的封装内，被设计成由固定到电路板的对应耦合元件接合，从而限制安装的封装的移动。

公开(公告)号：US20230170236A1

公开(公告)日：2023-06-01

申请号：US17993369

申请日：2022-11-23

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Silvio SPITERI ,  Tiziana BORG ,  Alex GRIMA

IPC: H01L21/673 ,  G01R31/28 ,  H01L21/677

CPC classification number: H01L21/67333 ,  G01R31/2893 ,  H01L21/67712

Abstract: A tray carrier includes a base plate having a first and second pairs of opposed sides as well as opposed first and second surfaces. Channel-shaped corner members provide containment formations for trays stacked at the first surface of the base plate. Tray carrier gripping cavities provided in the first pair of opposed sides can be engaged by gripping formations of an automated gripper to facilitate gripping the tray carrier. Raised portions at the first surface of the base plate provide a tray-gripping space engaged by gripping formations of the automated gripper to facilitate gripping trays stacked at the first surface of the base plate. Handle members at the second sides of the base plate facilitate manual handling of the tray carrier, and a pair of opposed recesses in the first sides of the base plate provide a narrowed intermediate portion of the base plate for manual handling of trays.

公开(公告)号：US11622183B2

公开(公告)日：2023-04-04

申请号：US17204613

申请日：2021-03-17

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Roberto Brioschi ,  Paul Anthony Barbara

IPC: H04R1/04 ,  B81B7/00 ,  H04R19/00 ,  H04R19/04 ,  H04R31/00 ,  H04R1/06

Abstract: A microelectromechanical microphone includes: a substrate; a sensor chip, integrating a microelectromechanical electroacoustic transducer; and a control chip operatively coupled to the sensor chip. In one embodiment, the sensor chip and the control chip are bonded to the substrate, and the sensor chip overlies, or at least partially overlies, the control chip. In another embodiment, the sensor is bonded to the substrate and a barrier is located around at least a portion of the sensor chip.

公开(公告)号：US11443958B2

公开(公告)日：2022-09-13

申请号：US17108471

申请日：2020-12-01

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Malta) Ltd

Inventor： Roseanne Duca ,  Dario Paci ,  Pierpaolo Recanatini

IPC: H01L21/324 ,  H01L23/16 ,  H01L23/31

Abstract: A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.

公开(公告)号：US20210098355A1

公开(公告)日：2021-04-01

申请号：US16586643

申请日：2019-09-27

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Marco DEL SARTO ,  Alex GRITTI ,  Pierpaolo RECANATINI ,  Michael BORG

IPC: H01L23/498 ,  H01L23/31

Abstract: The present disclosure is directed to a semiconductor package including a substrate having a lower surface with a plurality of slot structures. The plurality of slot structures are multi-layer structures that encourage the formation of solder joints. The semiconductor package is desirable for high reliability applications in which each solder joint termination should be checked by visual systems to ensure a proper electrical connection has been made.

公开(公告)号：US20200307994A1

公开(公告)日：2020-10-01

申请号：US16834042

申请日：2020-03-30

Applicant: STMicroelectronics (Malta) Ltd ,  STMicroelectronics S.r.l.

Inventor： Kevin FORMOSA ,  Marco DEL SARTO

IPC: B81C1/00 ,  B81B7/00

Abstract: A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.

公开(公告)号：US10600704B2

公开(公告)日：2020-03-24

申请号：US16133065

申请日：2018-09-17

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Malta) Ltd

Inventor： Jerome Lopez ,  Roseanne Duca

IPC: H01L23/495 ,  H01L23/10 ,  H01L23/31 ,  H01L21/50 ,  H01L23/498

Abstract: A support substrate has a face above which at least one electronic component is fixed. A peripheral area of the face includes an annular local metal layer. An encapsulating cover for the electronic component includes a peripheral wall having an end edge that is mounted above the peripheral area. The annular metal local layer includes, at the periphery thereof, a series of spaced-apart teeth with notches formed therebetween. The teeth extend as far as the peripheral edge of the support substrate.

公开(公告)号：US09698040B2

公开(公告)日：2017-07-04

申请号：US14926084

申请日：2015-10-29

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Jeremy Spiteri ,  Ivan Ellul

IPC: H01L21/683 ,  H01L21/66 ,  H01L21/68

CPC classification number: H01L21/6836 ,  H01L21/681 ,  H01L21/6835 ,  H01L22/12 ,  H01L2221/68309 ,  H01L2221/68313

Abstract: A semiconductor device carrier tape with image sensor detectable dimples is disclosed. The dimpled carrier tape is formed of a flexible strip of material. A plurality of pockets are disposed spaced apart along the length of the flexible strip of material. Each pocket is configured to hold a semiconductor device. A dimple is formed in each of the plurality of pockets where each dimple has a peripheral edge and a bottom surface. Detection of the dimple by an image sensor facilitates alignment of a semiconductor device with the pocket and precise placement of the semiconductor device in the pocket.