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公开(公告)号：KR1020040047105A
公开(公告)日：2004-06-05
申请号：KR1020020075193
申请日：2002-11-29
Applicant: 한국전자통신연구원
IPC: H04L9/06
CPC classification number: H04L9/0631
Abstract: PURPOSE: A polynomial multiplication device for block encryption and a multiplying method thereof are provided to perform a polynomial multiplication operation within a short period time by reducing the number of gates in a mix column conversion process. CONSTITUTION: A polynomial multiplication device for block encryption includes a storage, a first to a fourth multiplexer, a first to a sixth multiplier, a first and a second XOR operator, and a fifth multiplexer. The storage(10) stores arbitrary bit input data and performs a shift operation by one byte each clock. The first to the fourth multiplexers(20-1 to 20-4) are used for providing values of 8bits according to an encryption mode and a decryption mode. The first to the sixth multipliers(30-1 to 30-6) are used for multiplying hexadecimal values by the values of 8bits. The first and the second XOR operators(40-1,40-2) are used for performing the XOR operation for the values of 8bits in bit units and providing the outputs of 8bits. The fifth multiplexer(20-5) is used for deciding a result of a mix column conversion process according to the encryption mode and the decryption mode.
Abstract translation: 目的：提供一种用于块加密的多项式乘法装置及其乘法方法，通过减少混合列转换处理中的门数，在短时间内执行多项式乘法运算。 构成：用于块加密的多项式乘法装置包括存储器，第一至第四多路复用器，第一至第六乘法器，第一和第二XOR运算器以及第五多路复用器。 存储器（10）存储任意位输入数据，并且每个时钟执行一个字节的移位操作。 第一至第四多路复用器（20-1至20-4）用于根据加密模式和解密模式提供8位的值。 第一至第六乘法器（30-1至30-6）用于将十六进制值乘以8位值。 第一和第二XOR运算符（40-1,40-2）用于对位数单位8位的值执行异或运算，并提供8位输出。 第五多路复用器（20-5）用于根据加密模式和解密模式来确定混合列转换处理的结果。
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公开(公告)号：KR100426302B1
公开(公告)日：2004-04-08
申请号：KR1020010051800
申请日：2001-08-27
Applicant: 한국전자통신연구원
IPC: G06K19/07
Abstract: PURPOSE: A smart card including a USB(Universal Serial Bus) interface function is provided to improve communication speed and compatibility of the smart card by offering the smart card having a fast bus line, a peripheral device bus line, and an input/output interface module have the USB interface function supporting a USB of a PC. CONSTITUTION: A smart chip includes a control block(202), a memory block(210), a clock generating block(212), a signal processing block(214) and an interface block(216). The control block(202) controls an operation of the signal processing block(214) based on a clock provided from the clock generating block(212). The memory block(210) comprises an SRAM, a ROM and an EEPROM(Electronically Erasable and Programmable ROM). The SRAM reads and writes contents according to the execution of a card. The ROM stores an operating program of the card. The EEPROM stores an application program of various kinds of smart cards. The signal processing block(214) processes a signal among the control block(202), the memory block(210) and the interface block(216) physically connecting with each other through an internal bus.
Abstract translation: 目的：提供包括USB（通用串行总线）接口功能的智能卡，通过提供具有快速总线线路的智能卡，外围设备总线和输入/输出接口来提高智能卡的通信速度和兼容性 模块具有支持PC的USB的USB接口功能。 构成：一种智能芯片包括控制块（202），存储块（210），时钟发生块（212），信号处理块（214）和接口块（216）。 控制块（202）基于从时钟生成块（212）提供的时钟来控制信号处理块（214）的操作。 存储块（210）包括SRAM，ROM和EEPROM（电可擦除可编程ROM）。 SRAM根据卡的执行读取和写入内容。 ROM存储卡的操作程序。 EEPROM存储各种智能卡的应用程序。 信号处理块（214）处理控制块（202），存储块（210）和接口块（216）之间通过内部总线彼此物理连接的信号。
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公开(公告)号：KR100423811B1
公开(公告)日：2004-03-22
申请号：KR1020010078588
申请日：2001-12-12
Applicant: 한국전자통신연구원
IPC: G09C1/00
CPC classification number: H04L9/0625 , H04L2209/125 , H04L2209/24
Abstract: Disclosed is an encryption apparatus applying a KASUMI encryption algorithm. In the encryption apparatus, a round circuit is constructed through combination of an FL block with an FO block. The FL and FO blocks separate a secret key defined in the KASUMI encryption algorithm and provided from a secret key scheduler and 64-bit text data into 32-bit data, respectively, and perform specified encryption operation functions. The FO block is constructed through a multistage pipeline using a plurality of pipeline registers. The encryption apparatus has a low power consumption, and is small-sized in comparison to the conventional encryption apparatus using the MISTY or DES encryption algorithm. Also, the encryption apparatus can be applied to portable terminals and high-performance servers that require the low power consumption and the small size.
Abstract translation: 公开了应用KASUMI加密算法的加密设备。 在加密装置中，通过将FL块与FO块组合来构造回合电路。 FL和FO块分别将在KASUMI加密算法中定义并从密钥调度程序提供的密钥和64位文本数据分离为32位数据，并执行指定的加密操作功能。 FO块通过使用多个流水线寄存器的多级流水线来构建。 与使用MISTY或DES加密算法的传统加密设备相比，加密设备具有低功耗并且尺寸小。 而且，加密装置可以应用于需要低功耗和小尺寸的便携式终端和高性能服务器。
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公开(公告)号：KR100423810B1
公开(公告)日：2004-03-22
申请号：KR1020010078587
申请日：2001-12-12
Applicant: 한국전자통신연구원
IPC: G09C1/00
Abstract: PURPOSE: An apparatus for encoding an elliptic curve is provided to enhance the security and the performance of electronic commercial transaction, electronic cash, identification and key management of an user, and an approval process system by using various elliptic curve protocols. CONSTITUTION: An elliptic curve encoding apparatus includes a register file portion(200), an elliptic curve processor calculation portion(400), an order comparator portion(500), an NAF(Non Adjacent Format) converter portion(100), and an elliptic curve processor control portion(300). The register file portion stores input data and output data to encode an elliptic curve. The elliptic curve processor calculation portion performs a calculation operation for the elliptic curve by using the stored data of the register file portion. The order comparator portion searches and compares the orders necessary for the calculation operation. The NAF converter portion supports the scalar multiplication calculation. The elliptic curve processor control portion generates a control signal to control a calculation operation mode of the elliptic curve processor.
Abstract translation: 目的：提供一种用于编码椭圆曲线的设备，以通过使用各种椭圆曲线协议来增强电子商务交易，电子现金，用户的识别和密钥管理的安全性和性能，以及批准处理系统。 一种椭圆曲线编码装置，包括寄存器文件部分（200），椭圆曲线处理器计算部分（400），顺序比较器部分（500），NAF（非相邻格式）转换器部分（100）以及椭圆 曲线处理器控制部分（300）。 寄存器文件部分存储输入数据和输出数据以编码椭圆曲线。 椭圆曲线处理器计算部分通过使用寄存器文件部分的存储数据来执行椭圆曲线的计算操作。 订单比较器部分搜索并比较计算操作所需的订单。 NAF转换器部分支持标量乘法计算。 椭圆曲线处理器控制部分产生控制信号以控制椭圆曲线处理器的计算操作模式。
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公开(公告)号：KR100407692B1
公开(公告)日：2003-12-01
申请号：KR1020000073619
申请日：2000-12-06
Applicant: 한국전자통신연구원
IPC: G06F1/00
Abstract: PURPOSE: A system and a method for the real time security of a hard disk are provided to automatically encrypt or decrypt the file stored in a directory selected by a user according to a password key value of the user without encrypting and decrypting respective files by encrypting the data in the hard disk by a directory unit. CONSTITUTION: The system comprises a smart card(170) storing and managing the password key value using to encrypt the data, a hard disk manager(110) assigning the data as an encryption area by using the password key value and a hard disk event detector(120) detecting a write and read event for the data in the encryption area and requesting the encryption area assignment of the data. An encryption board(150) encrypts the data transmitted from the hard disk event detector by receiving a request for the encryption area assignment from the hard disk event detector through a PCI(Peripheral Component Interconnect) set register. The PCI operator(130) for the hard disk encryption board makes the hard disk real time security system recognize the encryption board by using the PCI set register.
Abstract translation: 目的：提供一种用于硬盘实时安全性的系统和方法，用于根据用户的密码键值自动加密或解密存储在用户选择的目录中的文件，而不用通过加密对各个文件进行加密和解密 硬盘中的数据由一个目录单元完成。 本发明提供了一种用于存储和管理密码密钥值的智能卡（170），该密钥密钥值用于加密数据，硬盘管理器（110）通过使用密码密钥值将该数据分配为加密区域，硬盘事件检测器 （120）检测加密区域中的数据的写入和读取事件并请求数据的加密区域分配。 加密板（150）通过经由PCI（外围组件互联）设置寄存器从硬盘事件检测器接收对加密区域分配的请求，来加密从硬盘事件检测器发送的数据。 用于硬盘加密板的PCI操作员（130）使硬盘实时安全系统通过使用PCI设置寄存器来识别加密板。
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Patent Agency Ranking
公开(公告)号：KR100365726B1
公开(公告)日：2002-12-26
申请号：KR1019990061214
申请日：1999-12-23
Applicant: 한국전자통신연구원
IPC: G06F11/00
Abstract: 1. 청구범위에기재된발명이속한기술분야본 발명은암호프로세서패키지에서의물리적인해킹방지장치에관한것임. 2. 발명이해결하려고하는기술적과제본 발명은, 해당물체에대한훼손, 이동, 절단등의해킹시도를감지함으로써, 보안대상이되는암호프로세서나 IC 카드프로세서내에존재하는사용자의비밀키, 개인신상정보, 주요코드등을삭제하여중요한정보의유출을막고, 불법적으로이를절취하고자하는시도를감지하기위한암호프로세서패키지에서의물리적인해킹방지장치를제공하고자함. 3. 발명의해결방법의요지본 발명은, 암호프로세서패키지에서의물리적인해킹방지장치에있어서, 보호대상체의표면에장착되며, 서로다른전위값을가지고있어상기보호대상체의해킹시인가된전위값의변화로위치변화를감지하기위한제1 및제2 위치변화감지수단; 상기제1 및제2 위치변화감지수단에전류원을공급하기위한전류공급수단; 및상기제1 및제2 위치변화감지수단의위치변화에따른전류의변화량을전위값으로변환시켜증폭하고변화값을기 저장된기준값과비교하여불법적인해킹을감지하기위한해킹감지수단을포함함. 4. 발명의중요한용도본 발명은물리적인해킹방지장치등에이용됨.
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公开(公告)号：KR100356013B1
公开(公告)日：2002-10-12
申请号：KR1020000046391
申请日：2000-08-10
Applicant: 한국전자통신연구원
IPC: G06F13/00
Abstract: 본 발명은 암호처리를 위한 범용 프로세서와 암호처리 코프로세서간의 접속장치에 관한 것으로, 상기 범용 프로세서(100)에서 출력되는 암호알고리즘에 따른 데이터를 디코딩하여 상기 암호처리 코프로세서(300) 및 외부장치로 제어신호를 출력하는 코프로세서 제어기(200); 상기 범용 프로세서(100)의 출력 데이터를 외부장치, 암호처리 코프로세서(300) 또는 멀티플렉서(500)로 선택적으로 공급하는 3-상태 버퍼(400); 및 상기 3-상태 버퍼(400)의 출력신호 및 상기 암호처리 코프로세서(300)로부터의 상태신호를 수신하여 상기 범용 프로세서(100)로 공급하는 멀티플렉서(500)를 구비하고, 상기 범용 프로세서(100)는 사전에 준비된 메모리맵(600)을 사용하여 상기 외부장치 및 상기 암호처리 코프로세서(300)와 데이터를 송/수신하는 것을 특징으로 하며, 범용 프로세서와 암호처리 코프로세서의 접속을 간단하며 효율적으로 할 수 있고, 또한 접속 설계 변경이 용이할 뿐만 아니라, 암호처리 속도 증가와 암호의 안전도도 향상되는 효과가 있다.
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公开(公告)号：KR1020020044631A
公开(公告)日：2002-06-19
申请号：KR1020000073619
申请日：2000-12-06
Applicant: 한국전자통신연구원
IPC: G06F1/00
Abstract: PURPOSE: A system and a method for the real time security of a hard disk are provided to automatically encrypt or decrypt the file stored in a directory selected by a user according to a password key value of the user without encrypting and decrypting respective files by encrypting the data in the hard disk by a directory unit. CONSTITUTION: The system comprises a smart card(170) storing and managing the password key value using to encrypt the data, a hard disk manager(110) assigning the data as an encryption area by using the password key value and a hard disk event detector(120) detecting a write and read event for the data in the encryption area and requesting the encryption area assignment of the data. An encryption board(150) encrypts the data transmitted from the hard disk event detector by receiving a request for the encryption area assignment from the hard disk event detector through a PCI(Peripheral Component Interconnect) set register. The PCI operator(130) for the hard disk encryption board makes the hard disk real time security system recognize the encryption board by using the PCI set register.
Abstract translation: 目的：提供用于硬盘实时安全性的系统和方法，以根据用户的密码键值自动加密或解密存储在用户选择的目录中的文件，而无需通过加密来加密和解密相应的文件 硬盘中的数据由目录单元组成。 构成：该系统包括：存储和管理用于加密数据的密码密钥值的智能卡（170）;硬盘管理器（110），通过使用密码密钥值将数据分配为加密区域;以及硬盘事件检测器 （120）检测加密区域中的数据的写入和读取事件，并请求数据的加密区域分配。 加密板（150）通过PCI（外围组件互连）设置寄存器从硬盘事件检测器接收到对加密区域分配的请求来加密从硬盘事件检测器发送的数据。 用于硬盘加密板的PCI操作器（130）使得硬盘实时安全系统通过使用PCI设置寄存器识别加密板。
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公开(公告)号：KR1020010102684A
公开(公告)日：2001-11-16
申请号：KR1020000024007
申请日：2000-05-04
Applicant: 한국전자통신연구원
IPC: H04L9/06
CPC classification number: H04L9/0625 , H04L2209/24
Abstract: 본 발명은 라운드 키 생성 및 암호처리용 암호화장치에 관한 것으로, 고속 암호 처리를 통해 시스템의 처리 속도를 향상시키고 암복호 동작이 시스템에 미치는 부하를 최소화하기 위해, 암호키/복호키와 제어변수를 입력받아 초기 키 입력과 사용암호 선택값을 제공하고, 라운드 키 결과를 받아 암호용/복호용 라운드 키를 제공하는 라운드 키 생성 제어수단; 초기 키 입력과 사용암호 선택값을 제공받아 라운드 키 생성 라운드의 수행에 의하여 라운드 키 결과를 생성하고, 생성된 라운드 키 결과를 라운드 키 생성 제어수단으로 제공하는 라운드 키 생성수단; 평문/암호문, 제어변수, 암호용/복호용 라운드 키를 제공받아 라운드 키, 초기 평문, 사용암호 선택값을 제공하고, 암호화/복호화 처리 결과를 받아 암호문/평문으로 출력하는 암호처리 제어수단; 및 라운드 키, 초기 평문, 사용암호 선택값을 첫 번째 라운드 입력으로 하고 암호처리 라운드를 반복하여 암호화/복호화 처리 결과를 생성하고, 생성된 암호화/복호화 처리 결과를 상기 암호처리 제어수단으로 출력하는 암호처리수단을 포함하여, 데이터 암호화/복호화를 필요로 하는 시스템 등에 이용된다.
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公开(公告)号：KR1020000037698A
公开(公告)日：2000-07-05
申请号：KR1019980052347
申请日：1998-12-01
Applicant: 한국전자통신연구원
IPC: G09C1/00
Abstract: PURPOSE: A round circuit for symmetric code is provided to improve a coding and decoding process velocity to improve a performance of a coding system by divides an operation block from a F-function block for performing a symmetric coding algorithm and rearranging the divided operation block. CONSTITUTION: An A operation block(420) has an XOR operation block, a first key dependence substitute block, a left circulatory block, and a second key dependence substitute block. A B operation block(430) has a first key dependence substitute block, a left circulatory block, and a second key dependence. An XOR(360) performs an XORing of results of the A operation block(420) and the B operation block(430). A SP operation block(520) inputs signals to the XOR(360).
Abstract translation: 目的：提供一种用于对称码的循环电路，以提高编码和解码处理速度，以通过将操作块与用于执行对称编码算法的F功能块分开并重新排列分割的运算块来提高编码系统的性能。 构成：A操作块（420）具有XOR操作块，第一密钥依赖替代块，左循环块和第二密钥依赖替代块。 B操作块（430）具有第一密钥依赖替代块，左循环块和第二密钥依赖。 XOR（360）执行A运算块（420）和B运算块（430）的结果的异或运算。 SP操作块（520）向XOR（360）输入信号。
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