Abstract:
A three state logic input recognizes three logic levels: an intermediate level in addition to the conventional "high" and "low" levels employed by binary logic systems. The three state device may be used in purely ternary logic systems or in "hybrid" systems which combine binary and ternary logic. In a preferred embodiment, the new three state logic device (10) comprises a "passive driver" (12) which is connected to produce one of three predetermined logic levels in corresponding to impedance paths from its input terminal (16) through an external circuit to a positive or negative voltage supply. In hybrid ternary/binary applications, the new three state input device includes a decoder (14) that is connected to decode the three predetermined logic levels provided by the passive driver into binary logic for use by associated binary logic devices. In a digital-to-analog converter (DAC) (50) application, the three state input device is employed to recognize both a binary logic and a control signal at one input pin to the DAC.
Abstract:
A duplex modulation method including the steps of using a first modulation technique to send downstream information over a cable and within a first region of the signal frequency spectrum; and using a multicarrier modulation technique to send upstream information over the cable and within a second region of the frequency spectrum, wherein the first region of the signal frequency spectrum is above the second region of the signal frequency spectrum, wherein the first modulation technique is different from the multicarrier modulation technique.
Abstract:
A protection circuit inhibits saturation and damage of sensitive circuit elements (54) when an input signal goes out of a nominal input range. The protection circuit includes an out-of-range detector (52) which compares the input signal to reference levels to determine if it is within the range. If it is not, a control circuit (62, 64) substitutes a supplemental signal that is slightly out of range, but not so far out of range as to cause any substantial saturation. Supplemental signal sources that produce supplemental signals slightly outside the high and low ends of the range with error margins, not more than about 750 mV, that lie just outside the range; an out-of-range input is replaced by the supplemental signal with the closest value. The invention is particularly applicable to multi-step/subranging analog-to-digital/converters.
Abstract:
A digital signal processor includes a control circuit for controlling transfer of instructions to and between a computation unit, a memory and an instruction cache. The memory includes a plurality of memory blocks. The control circuit includes a circuit for detecting a memory conflict condition when an instruction address on a first bus and a data address on a second bus both reference locations in one of the memory blocks in a single clock cycle. In response to the memory conflict condition, the instruction corresponding to the instruction address is fetched from the instruction cache when the instruction is stored in the instruction cache. When the instruction is not stored in the instruction cache, the instruction is fetched from memory and is loaded into the instruction cache. An internal memory conflict occurs when the instruction address and the data address reference locations in the same block of internal memory in the same clock cycle. An external memory conflict occurs when the instruction address and the data address reference locations in external memory in the same clock cycle. By selectively caching only those instructions which produce a conflict, a small instruction cache can be used.
Abstract:
A control system for a permanent magnet synchronous motor (12) includes a position estimator (20) for cross-correlating the back EMF of an unenergized winding (14, 16, 18) with a reference waveform to determine the estimated position of a rotor for determining rotor angle position error; an error integrator circuit (24), responsive to the rotor angle position error, for determining the angular speed of the field; an angle generator (22), responsive to the angular speed of the field, for generating the field angle position; and a waveform generator (26), responsive to the rotor angle position, for generating a periodic signal corresponding to each winding and designating a segment of that signal for driving that winding to adjust the field speed to the rotor speed.
Abstract:
An automatic and integrated mechanical and electrical accelerometer test system (10) includes a test fixture (12) for holding the accelerometers to be mechanically and electrically tested. A handler subsystem (16) automatically feeds the accelerometers (18, 20, 22) to the test fixture. A shaker subsystem (14) linked to the test fixture automatically vibrates the test fixture. A tester (30) electrically tests the accelerometers while the accelerometers are vibrating.
Abstract:
A method and apparatus for digital-to-analog conversion using sigma-delta modulation of the temporal spacing between digital samples are provided. The method and apparatus include sigma-delta modulation of the time-base such that errors produced by non-uniform sampling are frequency-shaped to a high frequency region where they are reduced by conventional filtering techniques. In one embodiment, an oversampling modulator receives digital input samples and, responsive to a noise-shaped clock signal, modulates the digital input samples to produce modulated samples at an oversampling rate. The oversampling rate preferably is equal to an oversampling ratio times a preselected input sample rate. A DAC, coupled to the modulator, converts the modulated samples to an analog signal. A modulator sample rate control circuit, coupled to the modulator, receives a frequency select signal representing the preselected input sample rate, and produces the noise-shaped clock signal for controlling operation of the modulator at the oversampling rate. The control circuit preferably includes a first sigma-delta modulator that sigma-delta modulates the frequency select signal. The oversampling modulator preferably includes a second sigma-delta modulator.
Abstract:
Open-loop differential amplifiers (120, 140) are disclosed which have accurate and stable gain. The gain of these amplifiers is substantially insensitive to the effects of small-signal emitter resistance re, current gain beta and Early voltage VA. Thus, their gain can be accurately set by resistance ratios which makes them particularly useful in integrated circuits. These advantages are obtained with an output differential pair (67) that has cross-coupled base and collector terminals. In addition, resistors (141, 143, 148, 150) and a current source (146) associated with this differential pair are related to like elements (27, 28, 24, 25 and 26) that are associated with an input differential pair (21) by disclosed numerical ratios, e.g., the nominal gain G of the amplifier. Versions of the amplifiers can be adapted for use as a residue amplifier (162) in a subranging A/D converter (160).
Abstract:
A differential amplifier operating as a magnitude amplifier may be used in a serial-type A/D converter. The differential amplifier uses complementary differential emitter pairs for folding and aligning a differential input signal. The differential input signal has a first signal and a second signal each of which is fed to one of two input circuits. One input circuit includes a bipolar npn transistor and a current sink and the other includes a bipolar pnp transistor and a current source. The outputs of the input npn transistors feed a differential pair of output pnp transistors. The emitters of the output pnp transistors are coupled, with the signal on the emitters following the lower of the differential input signals. The outputs of the input pnp transistors feed a differential pair of output npn transistors. The emitters of the output npn transistors also are coupled, with the signal on the emitters following the inputs in a predetermined manner. The results are folded signals at the outputs of the output transistors that are aligned by offset circuits.
Abstract:
An electro-mechanical micromachined structure uses bumpers (52) to prevent contact between structures at different potentials. A beam (22) is connected to one or more anchors (26) by flexible suspensions (24), which permit the beam (22) to move along a predetermined axis relative to one or more plates (34, 36). The suspension (24) includes at least one bumper (52) positioned so that the bumper (52) will contact another part of the suspension (24) before the beam (22) contacts the plates. The bumper is made from the same material as the suspension (24), during the same processing step. The bumper (52) is positioned to take advantage of shrinkage or expansion of the beam (22) during processing which forces the bumper (52) closer to its contact point than would otherwise be possible.