公开(公告)号：DE69934357T2

公开(公告)日：2007-09-20

申请号：DE69934357

申请日：1999-06-17

Applicant: SIEMENS AG ,  IBM

Inventor： GAMBINO JEFFREY P ,  GRUENING ULRIKE ,  MANDELMAN JACK A ,  RADENS CARL J

IPC: H01L21/8242 ,  H01L27/108

Abstract: Trench capacitors are fabricated utilizing a method which results in a refractory metal salicide as a component of the trench electrode in a lower region of the trench. The salicide-containing trench electrode exhibits reduced series resistance compared to conventional trench electrodes of similar dimensions, thereby enabling reduced ground rule memory cell leats and/or reduced cell access time. The trench capacitors of the invention are especially useful as components of DRAM memory cells.

公开(公告)号：AU2003202254A1

公开(公告)日：2004-08-10

申请号：AU2003202254

申请日：2003-01-08

Applicant: IBM

Inventor： WANG GENG ,  MANDELMAN JACK A ,  GAMBINO JEFFREY P

IPC: H01L21/20 ,  H01L21/308 ,  H01L21/8242

Abstract: Semiconductor devices are fabricated in a strained layer region and strained layer-free region of the same substrate. A first semiconductor device, such as a memory cell, e.g. a deep trench storage cell, is formed in a strained layer-free region of the substrate. A strained layer region is selectively formed in the same substrate. A second semiconductor device ( 66, 68, 70 ), such as an FET, e.g. an MOSFET logic device, is formed in the strained layer region.