公开(公告)号：JPS6269622A

公开(公告)日：1987-03-30

申请号：JP21085685

申请日：1985-09-24

Applicant: SONY CORP

Inventor： KADOMURA SHINGO

IPC: H01L21/302 ,  H01L21/3065

Abstract: PURPOSE:To put a high-selection ratio etching between silicon nitride and silicon oxide to practical use by a method wherein part of a nitride film formed on a silicon oxide film layer is etched away with gas containing fluorine and carbon and then, etching residues of the nitride film are removed by means of NF3-containing gas. CONSTITUTION:A silicon oxide film 2 and a silicon nitride film 3 are laminated in order on an Si substrate 1 and thereafter, an etching is performed from the upper direction by an RIE method with etching gas having a small F/C ratio like CH2F2 gas using a photo resist 4 as a mask. As the etching gas in this case, to use one to be produced by mixing excessively CO2 into gas containing fluorine and carbon as its constituent elements and having a small F/C ratio is desirable. After the etching, the photo resist 4 is ashed with plasma of O2, and at the same time, a polymer which became a mask for residues 5 is removed and a post-treatment is executed by performing a dry-etching with NF3/Ar gas to remove the residues 5. By this way, a high-selection ratio etching between a nitride and an oxide can be put to practical use.

公开(公告)号：JP2003257974A

公开(公告)日：2003-09-12

申请号：JP2002058468

申请日：2002-03-05

Applicant: SONY CORP

Inventor： SUZUKI ATSUSHI ,  KADOMURA SHINGO

IPC: H01L23/52 ,  H01L21/3205

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device which restrains the amount of hydrogen occluded in a barrier film of buried wiring by a damascene process, and a semiconductor device obtained by the method. SOLUTION: The semiconductor device has a wiring structure wherein a metal film 16 is embedded in a wiring trench 14 formed in an interlayer insulating film 13 whose surface is flattened via a barrier film 15. The upper end 15a of the barrier film 15 is covered with a film 16' formed without being exposed to a hydrogen atmosphere. The upper end 15a of the barrier film 15 is covered with, e.g. a metal film formed by a plating method or an organic film formed by a coating method. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2000124196A

公开(公告)日：2000-04-28

申请号：JP29372698

申请日：1998-10-15

Applicant: SONY CORP

Inventor： KADOMURA SHINGO

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/3205 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To provide a highly accurate etching method to be performed on an impurity containing polysilicon layer and a metallic layer which is independent of the conduction type of impurities. SOLUTION: In this plasma etching method, (1) a substrate 60 is carried into an etching chamber, whereon a dissolved substance is deposited on the inner wall. (2) Then, with the use of a fluorine-containing gas, a plasma etching treatment is performed on a metal layer 63 based on the desorbed and dissolved substance and the fluorine-containing gas, while the dissolved substance which is deposited on the inner wall of the etching chamber using the fluorine- containing gas, is being desorbed. (3) Then, a polysilicon layer 62, containing impurities, is plasma etched using an iodine-containing gas, a polymetal laminate, where a polysilicon layer 62 and a metallic layer 63 are laminated successively, is formed on the substrate 60, and a dissolved substance, which is the reaction product of the dissolved substance of the iodine-containing gas and the polysilicon layer, is deposited on the inner wall of the etching chamber.

公开(公告)号：JP2000114365A

公开(公告)日：2000-04-21

申请号：JP27698598

申请日：1998-09-30

Applicant: SONY CORP

Inventor： FUKAZAWA MASANAGA ,  KADOMURA SHINGO

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/312 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To prevent forming failures when an etching process with a groove and that with a connection hole are performed continuously to form the connection hole of a bow shape, due to the abrupt change in the etching area. SOLUTION: After an etching stopper film 2 is formed on a substrate 1, a first recessed part 3 reaching the substrate is formed at the etching stopper film 2. Then on the etching stopper film 2, an insulating film 4 is so formed as to fill the first recessed part 3. A second recessed part 5 is formed at the insulating film 4 through etching, while the etching stopper film 2 on the side peripheral of the first recessed part 3 is exposed in the second recessed part 5, and by making the etching stopper film 2 sputtered so that a sputtering object 6 is deposited as to cover the first recessed part 3, thus allowing etching to stop spontaneously.

公开(公告)号：JP2000091422A

公开(公告)日：2000-03-31

申请号：JP26104898

申请日：1998-09-16

Applicant: SONY CORP

Inventor： TAGUCHI MITSURU ,  KADOMURA SHINGO

IPC: H01L21/033 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To connect multilayer wirings without changing etching conditions, to surely obtain sufficient contact areas between multilayer wiring layers as designed without scale shift, to stabilize contact resistance and to also connect a partial layer in a multilayer wiring structure in terms of addition. SOLUTION: This manufacture method is provided with a process for forming an interlayer insulating film 15 covering a lower wiring 14, a process for forming a connection hole 16 connected to the lower wiring 14 on the interlayer insulating film 15, a process form forming an inter-wiring insulating film 17, where the connection hole 16 is embedded on the interlayer insulating film 15 with an insulating material which has etching rate higher than the etching rate of the interlayer insulating film 15, and a process for forming a recessed part 18 in the inter-wiring insulating film 17 and selectively opening the connection hole 16 to the interlayer insulating film in continuation of the recessed part 18.

公开(公告)号：JP2000091308A

公开(公告)日：2000-03-31

申请号：JP25297698

申请日：1998-09-07

Applicant: SONY CORP

Inventor： FUKAZAWA MASANAGA ,  KADOMURA SHINGO

IPC: H01L21/302 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To prevent opening of an organic film having a low permittivity from turning into bow shop by etching the organic film, in such a way that the resulting product when an inorganic hard mask is sputtered is deposited on the sidewall of the opening as a sidewall protective film. SOLUTION: After an aluminum wiring 101, a polyaryl ether film 102, a silicon oxide film 103 which is formed as an inorganic hard mask, and a photoresist film 104 are successively formed on an insulating film formed on a semiconductor substrate, a hole A is formed by opening a prescribed region of the photoresist film 104, and the silicon oxide film 103 is etched under a prescribed condition. Then the polyaryl ether film 102 is etched by using the etched silicon oxide film 103 as a mask, while the photoresist film 104 is left on the film 103. Consequently, the resulted product 105 when the film silicon oxide 103 is sputtered is deposited on the sidewall of the polyaryl ether film 102 in the hole A. The deposit controls the lateral reaction of the oxygen radicals in plasma and suppresses advance of etching in the lateral direction. Therefore, good anisotropic working can be realized.

公开(公告)号：JP2000082695A

公开(公告)日：2000-03-21

申请号：JP23075398

申请日：1998-08-17

Applicant: SONY CORP

Inventor： KADOMURA SHINGO ,  HIRANO SHINSUKE

IPC: H05B3/68 ,  C09K13/00 ,  C23F4/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/68 ,  H01L21/683

Abstract: PROBLEM TO BE SOLVED: To provide a plasma etching method capable of reliably suppressing the occurrence of a phenomenon in which a copper film cannot be etched due to a halogen-containing gas and copper reacting before a plasma discharge in plasma etching, the halogen-containing gas being undissociated and present within a chamber of a plasma etching apparatus. SOLUTION: In a plasma etching method for copper thin films an exposed surface 43A of a copper thin film 43 formed on substrates 40 and 41 is covered with a protective film 44 in order to prevent the surface 43A from coming in contact with a halogen-containing gas before a plasma discharge. Then, the film 44 is plasma-etched using the halogen-containing gas, and the film 43 is successively plasma-etched.

公开(公告)号：JP2000021846A

公开(公告)日：2000-01-21

申请号：JP18223898

申请日：1998-06-29

Applicant: SONY CORP

Inventor： FUKAZAWA MASANAGA ,  KADOMURA SHINGO

IPC: H01L21/302 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To etch an organic insulation film anisotropically by using gas comprising nitride gas or nitride gas for etching gas to be used when an organic insulation film is etched. SOLUTION: A wiring 12 is formed on a substrate 11 and an organic insulation film 13 formed of polyaryle ether is formed on the wiring 12. An inorganic insulation film 14 formed of an silicon oxide film is further formed on the organic insulation film 13 and a resist mask 15 is formed on the inorganic insulation film 14. After the inorganic insulation film 14 is etched by using the resist mask 15 as an etching mask, the organic insulation film 13 is etched by using gas comprising nitrogen gas or nitrogen gas and a connection hole 18 is formed in an insulation film 17 consisting of the inorganic insulation film 14 and the organic insulation film 13. Thereby, it is possible to prevent a cross sectional contour after etched from forming a boring.

公开(公告)号：JPH1197414A

公开(公告)日：1999-04-09

申请号：JP26008797

申请日：1997-09-25

Applicant: SONY CORP

Inventor： FUKAZAWA MASANAGA ,  KADOMURA SHINGO

IPC: H01L21/302 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To provide a plasma etching method which can prevent the occurrence of a bowing shape, the defective removal in a connecting hole, etching stop and the like when minute patterning, e.g. patterning of the connecting hole and the like having the minute opening diameter, is performed on a silicon-oxide based film. SOLUTION: An etching gas including at least SiF4 is used. At the same time, a sidewall protecting film 11 containing Si or containing Si-C bonding is thinly formed at the side wall of a connecting hole 9 under patterning, and plasma etching is performed during the formation. In addition to the connecting hole, the line and space pattern such as an off-set insulating film on a gate electrode can be used. A side-wall protecting film 11 including Si or Si-C bonding has the high etching resistance, effectively protects the side surface of the connecting hole 9 from the attack of radical and the like and contributes to anisotropic etching. Since the deposited film thickness of the side-wall protecting film 11 is relatively thin, the reduction of the etching rate by a micro-loading effect is prevented.

公开(公告)号：JPH1154602A

公开(公告)日：1999-02-26

申请号：JP20585197

申请日：1997-07-31

Applicant: SONY CORP

Inventor： TAKATSU MEGUMI ,  HIRANO SHINSUKE ,  KADOMURA SHINGO

IPC: B23Q3/15 ,  H01L21/68 ,  H01L21/683 ,  H02N13/00

Abstract: PROBLEM TO BE SOLVED: To simply and easily manufacture an electrode structure and obtain uniform attraction acting on a wafer, by providing a plurality of positive and negative concentrically circular electrode patterns respectively and alternately, and connecting the positive concentrically circular electrode patterns together and the negative concentrically circular electrode patterns together. SOLUTION: A two-pole electrostatic chuck 10 has a jacket 11 and an insulator 12 on the jacket 11, and a pair of positive and negative concentrically circular electrodes 13, 14 are buried in the insulator 12. Thereupon, a plurality of positive and negative concentrically circular electrode patterns 17, 19 are provided respectively and alternately, and the positive concentrically circular electrode patterns 17 are connected together and the negative concentrically circular electrode patterns 19 are connected together. Thus, a plurality of positive and negative concentrically circular electrode patterns 17, 19 are provided within the insulator 12 respectively so that they have a predetermined spacing capable of obtaining stable and uniform wafer attraction in the whole wafer attracting region, and a pair of alternately arranged positive and negative concentrically circular electrodes 13, 14 provide both of the positive and negative electrodes. Therefore, the wafer can surely be attracted.