DATA ARITHMETIC SYSTEM AND METHOD THEREFOR

    公开(公告)号:JPH10326258A

    公开(公告)日:1998-12-08

    申请号:JP13644397

    申请日:1997-05-27

    Applicant: SONY CORP

    Abstract: PROBLEM TO BE SOLVED: To facilitate a countermeasure to a case that the number of pixel data to be processed is increased. SOLUTION: When the number of pixel data to be processed is increased, a data arithmetic unit 2 is added to a data arithmetic unit 1. The data arithmetic unit 1 is allowed to process M pieces of pixel columns, and the data arithmetic unit 2 is allowed to process following M pieces of pixel columns. A point generating circuit 20 is allowed to generate a pointer with delay so that the first half M pieces of pixel columns can be prevented from being fetched. A selection signal generating circuit 31 generates a selection signal for selecting data outputted from an output SAM part 14 or an output SAM part 24 as necessary, and outputs it to a selector 30 for selection.

    IMAGE PROCESSOR AND METHOD THEREFOR

    公开(公告)号:JPH10275227A

    公开(公告)日:1998-10-13

    申请号:JP8129397

    申请日:1997-03-31

    Applicant: SONY CORP

    Abstract: PROBLEM TO BE SOLVED: To carry out contour emphasizing processing in software through the use of an SIMD-controlled linear array type multi-parallel processor, for example, by carrying out contour emphasis processing to inputted image data based on the characteristic of contour emphasizing processing. SOLUTION: A characteristic image display means displays a characteristic image showing the characteristic of contour emphasizing processing to image data inputted from outside. A characteristic accepting means accepts the characteristic of contour emphasizing processing according to the displayed characteristic picture. A characteristic image changing means changes the characteristic image showing the characteristic of contour emphasizing processing. A contour emphasizing processing means executes contour emphasizing processing to the inputted image based on the characteristic of contour emphasizing processing. It is desirable that the display means additionally displays image data given contour emphasizing processing.

    SIGNAL PROCESSOR
    63.
    发明专利

    公开(公告)号:JPH09106389A

    公开(公告)日:1997-04-22

    申请号:JP29030095

    申请日:1995-10-12

    Applicant: SONY CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a signal processor which improves throughput, has versatility and simplifies configuration by providing plural processor blocks, 1st selector and 2nd processor. SOLUTION: 1st-3rd blocks 91-93 and 4th-6th blocks 94-96 composed of multiple parallel processors one-dimensionally arranging a lot of big processor elements are respectively longitudinally parallelly provided while excluding redundancy by omitting excessive input serial access memory(SAM) parts and output SAM parts so that 1st and 2nd block sequences 101 and 102 can be formed. Then, the 1st and 2nd block sequences 101 and 102 are connected so as to be laterally extended through 1st and 2nd selectors 24 and 25. Thus, a processor 90 for video signal, which improves throughput, has versatility and simplifies configuration, can be provided for practically sufficiently dealing with various image formats in simple configuration.

    PLOTTING DEVICE
    64.
    发明专利

    公开(公告)号:JPH0651750A

    公开(公告)日:1994-02-25

    申请号:JP22482392

    申请日:1992-07-31

    Applicant: SONY CORP

    Abstract: PURPOSE:To speed up the graphic plotting of the platting device by generating addresses in a chip and writing them in an optional memory block of a memory cell array at the same time. CONSTITUTION:A logical operation means which compares its column address and a start column address ASC or end column address AEC supplied to each column line of the bit map memory 27, column by column, enables column lines corresponding to column addresses specified between the column lines specified with the start column address ASC and end column address AEC to write and read data, thereby speeding up the plotting of pixel data.

    CLOCK GENERATING CIRCUIT
    65.
    发明专利

    公开(公告)号:JPH05129895A

    公开(公告)日:1993-05-25

    申请号:JP31320491

    申请日:1991-10-31

    Applicant: SONY CORP

    Abstract: PURPOSE:To obtain a prescribed number of clock signals in average at a desired frequency in response to set code information regardless of a temperature change. CONSTITUTION:Each inverter means of a ring oscillator 2 comprising connecting plural inverter means in a ring consists of a 1st path inverting singly a clock CKO and a 2nd path delaying the clock CKO by a prescribed unit time only, and the 1st or the 2nd path is selected in response to the code information given to a selector means to obtain a clock output at a prescribed period thereby varying the generated clock frequency depending on how to provide the code information, and the desired frequency is oscillated and a prescribed number of clock signals CKO is obtained in average independently of a temperature change.

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