公开(公告)号：EP1101239A1

公开(公告)日：2001-05-23

申请号：EP99930812.5

申请日：1999-06-29

Applicant: Candescent Technologies Corporation

Inventor： SCHROPP, Donald, R., Jr. ,  FIELD, John, E. ,  DUNPHY, James, C. ,  PAN, Lawrence, S. ,  MORRIS, David, L. ,  BESSER, Ronald, S. ,  SPINDT, Christopher, J.

IPC: H01J19/38

CPC classification number: H01J29/028 ,  H01J29/467 ,  H01J29/481 ,  H01J31/127 ,  H01J2201/025 ,  H01J2329/8625

Abstract: The intensity at which electrons emitted by a first plate structure (10) in a slat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (40p1 and 40p2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.

公开(公告)号：EP1101238A1

公开(公告)日：2001-05-23

申请号：EP99933579.7

申请日：1999-06-25

Applicant: Candescent Technologies Corporation

Inventor： NARAYANAN, Kollengode ,  HOPPLE, George, B. ,  FAHLEN, Theodore, S. ,  KLATT, John, P.

IPC: H01J17/49

CPC classification number: H01J29/028 ,  H01J9/185 ,  H01J9/242 ,  H01J9/261 ,  H01J29/864 ,  H01J31/123 ,  H01J61/305 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8665

Abstract: A flat panel display including a wall (590) in one embodiment includes 98 % alumina and a refractory metal, such as, 2 % titania, for increased thermal conductivity. Alternatively, the refractory metal may be molybdenum, niobium, tungsten, or nickel. The wall may further include cordierite, or zirconia.

公开(公告)号：EP1099233A1

公开(公告)日：2001-05-16

申请号：EP99925586.2

申请日：1999-05-11

Applicant: Candescent Technologies Corporation

Inventor： PAN, Lawrence, S. ,  STANNERS, Colin, D. ,  FAHLEN, Theodore, S.

IPC: H01J1/88

CPC classification number: H01J9/38

Abstract: A flat panel display that has internal components (102) that are cleaned using a dry cleaning treatment.

公开(公告)号：EP1074015A1

公开(公告)日：2001-02-07

申请号：EP98961963.0

申请日：1998-12-07

Applicant: Candescent Technologies Corporation

Inventor： HANSEN, Ronald, L. ,  FRIEDMAN, Jay ,  FREIBERG, Paul

IPC: G09G3/22

CPC classification number: G09G3/22 ,  G09G3/2011 ,  G09G2310/027 ,  G09G2320/043 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/0666

Abstract: A circuit and method for time multiplexing a voltage signal for controlling the color balance of a flat panel display, Field Emission Display (200). Row drivers (220) are sequentially activated during 'row on-time windows' and corresponding individual gray scale information (voltage) are driven by column drivers (240). In one embodiment, within each column driver (240a(i)), a first error compensation circuit (810a(i)), during the first frame of each frame pair, divides the first voltage data and generates a second voltage data having a negative error, and a second error compensation circuit (820a(i)) during the second frame of each frame pair generates a second voltage data having a positive error. Selection circuitry for driving a first voltage data during a first part of the row on-time window and a second voltage data during a second part of the row on-time window comprises multiplexers (830a(i) and 834a(i)), output register (320(i)), decoder (330a(i)), digital-to-analog converter (340a(i)), channel amplifier (370a(i)).

Abstract translation: 一种用于时间多路复用电压信号以控制平板显示器的色彩平衡的电路和方法，场发射显示器（200）。 行驱动器（220）在“行开启时间窗”期间被顺序地激活，并且对应的单独灰度级信息（电压）由列驱动器（240）驱动。 在一个实施例中，在每个帧对的第一帧期间，第一误差补偿电路（810a（i））在每个列驱动器（240a（i））内分割第一电压数据并且生成具有负的第二电压数据 误差，并且在每个帧对的第二帧期间第二误差补偿电路（820a（i））产生具有正误差的第二电压数据。 用于在行导通时间窗的第一部分期间驱动第一电压数据的选择电路和在行导通时间窗的第二部分期间的第二电压数据包括多路复用器（830a（i）和834a（i）），输出 （320a（i）），解码器（330a（i）），数模转换器（340a（i）），信道放大器（370a（i））。

公开(公告)号：EP1016113A1

公开(公告)日：2000-07-05

申请号：EP98945990.4

申请日：1998-09-10

Applicant: Candescent Technologies Corporation

Inventor： CHAKRAVORTY, Kishore, K. ,  RAMANI, Swayambu

IPC: H01J1/02

CPC classification number: H01J3/022 ,  H01J1/30 ,  H01J9/025 ,  H01J9/14 ,  H01J2201/30403 ,  H01J2329/00

Abstract: A flat panel display includes a cathodic structure (100). The cathodic structure includes a row metal (106) composed of stripes of aluminum overlaid by a layer (107) of cladding material.

公开(公告)号：EP1004027A1

公开(公告)日：2000-05-31

申请号：EP98934613.5

申请日：1998-07-24

Applicant: Candescent Technologies Corporation

Inventor： FIELD, John, E. ,  OBERG, Stephanie, J.

IPC: G01R1/00

CPC classification number: G09G3/006 ,  G01R15/148 ,  H01J9/42 ,  H01J2329/00

Abstract: A device (16) for sensing current flowing in a generally flat plate structure (10) contains a magnetic head (18) and signal processing circuitry (20). The magnetic head (a) senses changes in current-induced magnetic flux as the head is positioned over the plate structure and (b) provides a head output signal. The signal processing circuitry processes the head output signal to produce a data signal indicative of how much current appears to flow in the plate structure below the head. A driving voltage, which typically varies in a periodic manner to produce a characteristic signature, is applied to a primary conductor in the plate structure. When the plate structure contains a group of first electrical conductors (32) that are nominally electrically insulated from and cross a group of second electrical conductors (48), a probability analysis technique is typically performed on magnetically obtained current data to detect short circuit defects in the plate structure.

公开(公告)号：EP0992061A1

公开(公告)日：2000-04-12

申请号：EP98921171.9

申请日：1998-05-13

Applicant: Candescent Technologies Corporation

Inventor： PONG, Chungdee ,  PORTER, John, D. ,  FAHLEN, Theodore, S. ,  CURTIN, Christopher, J. ,  NEIMEYER, Robert, G. ,  LUDWIG, Paul, N.

IPC: H01J63/02

CPC classification number: H01J61/305 ,  H01J9/185 ,  H01J9/242 ,  H01J9/261 ,  H01J29/028 ,  H01J29/864 ,  H01J31/123 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8665

Abstract: A flat panel display includes a wall (103-102) which is held in place by a structure formed either on the faceplate (101) or on the backplate (210). In one embodiment, the supporting structure is formed by two adjacent walls that forms a slot which mechanically restrains the wall. In another embodiment, a slot is formed within the faceplate and the walls of the slot mechanically restrain the wall. In one embodiment, the wall segments are inserted into supporting structures that mechanically restrain each wall segment. In another embodiment, a UV curable adhesive is used to maintain walls in their proper alignment and position. The bond electrically connects conductive lines located on the wall and conductive lines located on the faceplate and maintains the wall in proper alignment.

公开(公告)号：EP0992055A1

公开(公告)日：2000-04-12

申请号：EP98930209.6

申请日：1998-06-18

Applicant: Candescent Technologies Corporation

Inventor： SUN, Jennifer, Y. ,  MA, Yutao

IPC: H01J9/26

CPC classification number: H01J9/261 ,  H01J2329/00

Abstract: A flat panel display and a method for forming a flat panel display uses a low temperature glass frit deposit (101). In one embodiment the assembly (102) is heated to a low frit sealing temperature of about 220 degrees centigrade in a vacuum by step (104) to form a tubeless seal. The low temperature frit allows for melting of the glass frit at a temperature lower than that of prior art processes. Also, process steps associated with evacuation through an evacuation tube are eliminated.

公开(公告)号：EP0985220A1

公开(公告)日：2000-03-15

申请号：EP98924767.1

申请日：1998-05-26

Applicant: Candescent Technologies Corporation

Inventor： SPINDT, Christopher, J. ,  OBERG, Stephanie, J. ,  HAVEN, Duane, A. ,  BARTON, Roger, W. ,  LEARN, Arthur, J. ,  BASCOM, Victoria, A.

IPC: H01J1/30 ,  H01J19/24

CPC classification number: H01J9/025 ,  H01J3/022 ,  H01J2329/00

Abstract: An electron-emitting device utilizes an emitter electrode (12) shaped like a ladder in which a line of emitter openings (18) extend through the electrode. In fabricating the device, the emitter openings can be utilized to self-align certain edges, such as edges (38C) of a focusing system (37), to other edges, such as edges (28C) of control electrodes (28), to obtain desired lateral spacings. The self-alignment is typically achieved with the assistance of a backside photolithographic exposure operation. The ladder shape of the emitter electrode also facilitates the removal of short-circuit defects involving the electrode.

公开(公告)号：EP0979525A2

公开(公告)日：2000-02-16

申请号：EP98918281.1

申请日：1998-04-27

Applicant: Candescent Technologies Corporation

Inventor： HAVEN, Duane, A. ,  LEARN, Arthur, J. ,  PORTER, John, D.

IPC: H01J29/10

CPC classification number: H01J29/085 ,  H01J31/127

Abstract: Openings are created in a structure by a process in which a plate (20) is furnished with a sacrificial patterned masking layer divided into multiple laterally separated mask portions (22A). A primary layer of actinic material (28) is provided over the masking layer and in the space between the mask portions. Material of the primary layer that is not shadowed by a mask formed with the mask portions is backside exposed to actinic radiation (30). Material of the primary layer not exposed to the radiation is removed. Segments of the masking layer not covered by exposed material of the primary layer are then removed. Consequently, openings extend through the primary layer where the segments of the masking layer have been removed. The process is typically employed in forming an optical device such as a flat-panel cathode-ray tube display in which the openings in the primary layer receive light-emissive material.