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公开(公告)号：KR1020130014175A
公开(公告)日：2013-02-07
申请号：KR1020110076135
申请日：2011-07-29
Applicant: 한국과학기술원
IPC: H01G5/40
Abstract: PURPOSE: A method for controlling a variable capacity condenser for a high voltage and a high current is provided to prevent damage to a condenser caused by a rapid increase in currents around a resonance point by controlling a connection method of the condenser and a sensor. CONSTITUTION: Damage to a condenser is prevented by controlling a connection method of a condenser and a sensor. The capacity of the condenser is controlled by monitoring current changes through the sensor so that a current more than a damage threshold of the condenser is not flowed. Damage to the condenser, caused by a rapid increase in currents around a resonance point, is prevented.
Abstract translation: 目的：提供一种用于控制高电压和高电流的可变容量电容器的方法，以通过控制冷凝器和传感器的连接方法来防止由谐振点周围的电流的快速增加引起的对冷凝器的损坏。 构成：通过控制冷凝器和传感器的连接方法来防止冷凝器的损坏。 通过监测通过传感器的电流变化来控制冷凝器的容量，使得不会流过大于冷凝器的损伤阈值的电流。 由于谐振点周围的电流的急剧增加而导致的冷凝器损坏被阻止。
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公开(公告)号：KR1020130013417A
公开(公告)日：2013-02-06
申请号：KR1020110075050
申请日：2011-07-28
Applicant: 한국과학기술원
Abstract: PURPOSE: A variable capacity condenser for high voltage and high current of a structure with multiple pole plates is provided to easily adjust a value, thereby obtaining a precise resonance point in any circumstances. CONSTITUTION: Two electrodes(10) are faced with each other. Intervals of the electrodes are broadened and narrowed by using a worm gear and a motor. An end part of an electrode is sharply formed. A high frequency condenser of high voltage and high current adjusts a high capacity value.
Abstract translation: 目的：提供具有多极板结构的高电压和高电流的可变容量电容器，以便轻松调整值，从而在任何情况下获得精确的谐振点。 构成：两个电极（10）彼此面对。 通过使用蜗轮和电动机，电极的间隔变宽和变窄。 电极的端部尖锐地形成。 高电压和高电流的高频电容调节高容量值。
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公开(公告)号：KR1020130013415A
公开(公告)日：2013-02-06
申请号：KR1020110075048
申请日：2011-07-28
Applicant: 한국과학기술원
Abstract: PURPOSE: A variable capacity condenser for high voltage and high current of single pole plate structure is provided to precisely control a capacity value of the condenser, thereby obtaining a precise resonance point in any circumstances. CONSTITUTION: Two electrodes(10) are faced with each other. Intervals(d) of the two electrodes are broadened and narrowed by using a worm gear and a motor. An insulator is inserted between the two electrodes. The motor is controlled by using a separate control device.
Abstract translation: 目的：提供用于单极板结构的高电压和高电流的可变容量电容器，以精确控制冷凝器的容量值，从而在任何情况下获得精确的谐振点。 构成：两个电极（10）彼此面对。 通过使用蜗轮和电动机，两个电极的间隔（d）变宽和变窄。 在两个电极之间插入绝缘体。 电机通过使用单独的控制装置进行控制。
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公开(公告)号：KR1020130013405A
公开(公告)日：2013-02-06
申请号：KR1020110075031
申请日：2011-07-28
Applicant: 한국과학기술원
Abstract: PURPOSE: A buried structure of a feed line is provided to divide concrete and the feed line, thereby easily controlling a location of the feed line. CONSTITUTION: A buried structure(1) of a feed line includes a lower member, a feed line, and an upper cover. The lower member is formed with a plurality of single layers. The feed line is arranged in a single layer unit. The feed line is composed of one or more lines which supply power.
Abstract translation: 目的：提供一条供料线的埋设结构，以分隔混凝土和进料管线，从而轻松控制进料管线的位置。 构成：馈线的埋设结构（1）包括下构件，馈线和上盖。 下部构件形成有多个单层。 进料管线布置成单层。 馈线由一条或多条供电线组成。
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公开(公告)号：KR101216946B1
公开(公告)日：2013-01-02
申请号：KR1020120006102
申请日：2012-01-19
Applicant: 한국과학기술원
Abstract: PURPOSE: An on-chip laminated spiral inductor is provided to reduce the loss of a substrate by connecting laminated planar spiral inductors in parallel. CONSTITUTION: A multilayer wiring layer is formed on a semiconductor substrate. A spiral coil is formed on each layer of the multilayer wiring layer. A first vertical via(IVV) commonly connects one ends of the spiral coil in each layer. A second vertical via(OVV) commonly connects the other ends of the spiral coil in each layer. A wiring width of the spiral coil is wider from the upper layer to the lower layer.
Abstract translation: 目的：提供片上层叠螺旋电感器，以平行连接叠层平面螺旋电感来减少基板的损耗。 构成：在半导体基板上形成多层布线层。 螺旋线圈形成在多层布线层的每一层上。 第一垂直通孔（IVV）通常连接每层中的螺旋线圈的一端。 第二垂直通孔（OVV）通常连接每层螺旋线圈的另一端。 螺旋线圈的布线宽度从上层到下层较宽。
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Patent Agency Ranking
公开(公告)号：KR101210344B1
公开(公告)日：2012-12-10
申请号：KR1020060087005
申请日：2006-09-08
CPC classification number: H04L1/06 , H04B7/15592 , H04L2001/0097
Abstract: 가상적인 MIMO 채널을구성하는릴레이네트워크에서채널행렬에대한좌표회전처리를수행함으로써 full diversity gain을얻을수 있도록하는좌표회전릴레이시스템및 좌표회전릴레이방법을개시한다. 좌표회전릴레이시스템은, 릴레이네트워크의소스에서송신되는심볼을병렬로구성하여심볼행렬을작성하는행렬작성수단, 및상기작성된심볼행렬에좌표회전행렬을부가하여, 상기심볼행렬내 심볼을좌표회전시키는좌표회전수단을포함하는것을특징으로한다.
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公开(公告)号：KR1020120082768A
公开(公告)日：2012-07-24
申请号：KR1020110004258
申请日：2011-01-14
Applicant: 한국과학기술원
Abstract: PURPOSE: A loop type electromagnetic wave shielding apparatus including an automatic controller, a power supply apparatus and a current collector including the same, and an electromagnetic wave shielding method using a loop are provided to form an optimal shield condition by automatically controlling capacitance of a capacitor connected to a loop. CONSTITUTION: A leakage magnetic field generator(10) generates a leakage magnetic field to be shielded. The leakage magnetic field reduces through a closed loop(110). A magnetic field sensor part(121) senses a magnetic field generated from the closed loop. An EMF(Electromagnetic Field) size sensor(122) senses the size of a transmitted magnetic field. A capacitance calculating part(123) calculates capacitance of a capacitor for appropriately reducing the magnetic field measured from transmitted size information of the magnetic field. An on/off control signal of each switch in a switch array(124) is applied to each capacitor in order to control the capacitance of a capacitor array(125).
Abstract translation: 目的：提供一种包括自动控制器，电源装置和包括该自动控制器的集电器的环路型电磁波屏蔽装置，以及使用环路的电磁波屏蔽方法，通过自动控制电容器的电容来形成最佳的屏蔽状态 连接到一个循环。 构成：泄漏磁场发生器（10）产生要屏蔽的漏磁场。 泄漏磁场通过闭环（110）减小。 磁场传感器部分（121）感测从闭环产生的磁场。 EMF（电磁场）尺寸传感器（122）感测发射磁场的大小。 电容计算部（123）根据磁场的传送尺寸信息，计算用于适当减小磁场的电容器的电容。 将开关阵列（124）中的每个开关的开/关控制信号施加到每个电容器，以便控制电容器阵列（125）的电容。
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公开(公告)号：KR1020120069797A
公开(公告)日：2012-06-29
申请号：KR1020100131097
申请日：2010-12-21
Applicant: 한국과학기술원
Abstract: PURPOSE: A through silicon via capacitor, a manufacturing method thereof, and a 3D integrated circuit are provided to obtain high capacitance by using the silicon through electrode of a vertical structure. CONSTITUTION: A first substrate(100) includes a plurality of circuit boards(11) and a plurality of TSV(Through Silicon Via) capacitors(15). An intermediate layer(300) is formed between the plurality of circuit boards and includes a solder bump(330) and an underfill resin layer(310). The solder bump electrically connects the plurality of circuit boards. A second substrate(200) includes a plurality of active regions, a wiring region, and a TSV capacitor.
Abstract translation: 目的：提供一种通过硅通孔电容器，其制造方法和3D集成电路，以通过使用垂直结构的硅通孔来获得高电容。 构成：第一基板（100）包括多个电路板（11）和多个TSV（贯通硅通孔）电容器（15）。 在多个电路板之间形成中间层（300），并包括焊料凸块（330）和底部填充树脂层（310）。 焊料凸块电连接多个电路板。 第二基板（200）包括多个有源区，布线区和TSV电容。
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公开(公告)号：KR101139699B1
公开(公告)日：2012-05-02
申请号：KR1020100038369
申请日：2010-04-26
Applicant: 한국과학기술원
Abstract: 수동소자들이 적층된 반도체 칩은 기판, 활성층, 수동소자들 및 복수의 관통 실리콘 비아들을 포함한다. 활성층은 집적소자들, 전원 전압을 전달하는 파워 패턴들, 접지 전압을 전달하는 접지 패턴들 및 전기적 신호를 전달하는 신호 패턴들을 포함하며, 기판의 일면에 형성된다. 수동소자들은 기판의 타면에 적층된다. 복수의 관통 실리콘 비아들은 수동소자들 및 집적소자들이 전기적으로 연결되도록 기판을 관통하여 형성되며 이산화규소(SiO
2 )막으로 둘러싸인다. 복수의 관통 실리콘 비아들 중 일부는 수동소자들에 전원 전압을 전달하며, 복수의 관통 실리콘 비아들 중 나머지는 수동소자들에 접지 전압을 전달한다.-
公开(公告)号：KR1020110118948A
公开(公告)日：2011-11-02
申请号：KR1020100038369
申请日：2010-04-26
Applicant: 한국과학기술원
Abstract: PURPOSE: A semiconductor chip with a passive device, a three dimensional multi chip including the same, and a three dimensional multi chip package including the same are provided to reduce power noise by electrically connecting the passive devices to the semiconductor chip. CONSTITUTION: A semiconductor chip with a passive device(130) includes a substrate, active layer, a passive device, and a plurality of through silicon vias. The active layer includes integrated devices, power patterns, ground patterns, and signal patterns(127) and is formed on one side of the substrate. A plurality of through silicon vias(114) passes through the substrate to electrically connect the passive device to the integrated device and is surrounded with SiO2. A part of through silicon vias transmits power voltage to the passive device. The remaining through silicon vias transmit the ground voltage to the passive devices.
Abstract translation: 目的：提供一种具有无源器件的半导体芯片，包括该半导体芯片的三维多芯片以及包含该半导体芯片的三维多芯片封装，以通过将无源器件电连接到半导体芯片来降低功率噪声。 构成：具有无源器件（130）的半导体芯片包括衬底，有源层，无源器件和多个通孔硅通孔。 有源层包括集成器件，功率图案，接地图案和信号图案（127），并且形成在衬底的一侧上。 多个穿通硅通孔（114）穿过衬底以将无源器件电连接到集成器件并被SiO 2包围。 通过硅通孔的一部分将电源电压传输到无源器件。 剩余的通过硅通孔将接地电压传送到无源器件。
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