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    High temperature chuck for plasma processing systems
    72.
    发明授权
    High temperature chuck for plasma processing systems 有权

    公开(公告)号：US09728437B2

    公开(公告)日：2017-08-08

    申请号：US14612472

    申请日：2015-02-03

    Applicant: Applied Materials, Inc.

    Inventor： Toan Q. Tran ,  Sultan Malik ,  Dmitry Lubomirsky ,  Shambhu N. Roy ,  Satoru Kobayashi ,  Tae Seung Cho ,  Soonam Park ,  Shankar Venkataraman

    IPC: H01L21/683 ,  H01L21/3065 ,  H01L21/67

    CPC classification number: H01L21/6833 ,  H01L21/3065 ,  H01L21/67103

    Abstract: A wafer chuck assembly includes a puck, a shaft and a base. An insulating material defines a top surface of the puck, a heater element is embedded within the insulating material, and a conductive plate lies beneath the insulating material. The shaft includes a housing coupled with the plate, and electrical connectors for the heater elements and the electrodes. A conductive base housing couples with the shaft housing, and the connectors pass through a terminal block within the base housing. A method of plasma processing includes loading a workpiece onto a chuck having an insulating top surface, providing a DC voltage differential across two electrodes within the top surface, heating the chuck by passing current through heater elements, providing process gases in a chamber surrounding the chuck, and providing an RF voltage between a conductive plate beneath the chuck, and one or more walls of the chamber.

    Enhanced etching processes using remote plasma sources
    76.
    发明授权
    Enhanced etching processes using remote plasma sources 有权
    使用远程等离子体源的增强蚀刻工艺

    公开(公告)号：US09362130B2

    公开(公告)日：2016-06-07

    申请号：US14186059

    申请日：2014-02-21

    Applicant: Applied Materials, Inc.

    Inventor： Nitin K. Ingle ,  Dmitry Lubomirsky ,  Xinglong Chen ,  Shankar Venkataraman

    IPC: H01L21/3065 ,  H01J37/32

    CPC classification number: H01L21/3065 ,  H01J37/32082 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32449 ,  H01J2237/334

    Abstract: Methods of etching a patterned substrate may include flowing an oxygen-containing precursor into a first remote plasma region fluidly coupled with a substrate processing region. The oxygen-containing precursor may be flowed into the region while forming a plasma in the first remote plasma region to produce oxygen-containing plasma effluents. The methods may also include flowing a fluorine-containing precursor into a second remote plasma region fluidly coupled with the substrate processing region while forming a plasma in the second remote plasma region to produce fluorine-containing plasma effluents. The methods may include flowing the oxygen-containing plasma effluents and fluorine-containing plasma effluents into the processing region, and using the effluents to etch a patterned substrate housed in the substrate processing region.

    Abstract translation: 蚀刻图案化衬底的方法可以包括使含氧前体流入与衬底处理区流体耦合的第一远程等离子体区域。 可以在第一远程等离子体区域中形成等离子体的同时将含氧前体流入该区域以产生含氧等离子体流出物。 所述方法还可以包括使含氟前体流入与基板处理区流体耦合的第二远程等离子体区域，同时在第二远程等离子体区域中形成等离子体以产生含氟等离子体流出物。 所述方法可以包括将含氧等离子体流出物和含氟等离子体流出物流入处理区域，并且使用流出物蚀刻容纳在基板处理区域中的图案化基板。

    WORDLINE 3D FLASH MEMORY AIR GAP
    77.
    发明申请
    WORDLINE 3D FLASH MEMORY AIR GAP 审中-公开

    公开(公告)号：US20160043099A1

    公开(公告)日：2016-02-11

    申请号：US14452378

    申请日：2014-08-05

    Applicant: Applied Materials, Inc.

    Inventor： Vinod R. Purayath ,  Randhir Thakur ,  Shankar Venkataraman ,  Nitin K. Ingle

    IPC: H01L27/115 ,  H01L21/3213 ,  H01L21/311

    CPC classification number: H01L27/11582 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/67103 ,  H01L21/6719 ,  H01L21/764

    Abstract: Methods of forming air gaps in a 3-d flash memory cell using only gas-phase etching techniques are described. The methods include selectively gas-phase etching tungsten deposited into the stack structure to separate the tungsten levels. Other metals than tungsten may be used. The methods also include selectively etching silicon oxide from between the tungsten levels to make room for vertically spaced air gaps. A nonconformal silicon oxide layer is then deposited to trap the air gaps. Both tungsten removal and silicon oxide removal use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. The nonconformal silicon oxide may be deposited inside or outside the mainframe.

    Abstract translation: 描述了仅使用气相蚀刻技术在3-d闪存单元中形成气隙的方法。 这些方法包括选择性地将钨沉积到堆叠结构中的钨相蚀刻钨以分离钨含量。 可以使用除钨以外的其他金属。 所述方法还包括从钨水平之间选择性地蚀刻氧化硅以为垂直间隔的气隙腾出空间。 然后沉积非共形氧化硅层以捕获气隙。 除钨和氧化硅除去都使用连接在同一主机上的远程激发的含氟装置，以便于在没有中间大气暴露的情况下进行这两种操作。 非共形氧化硅可以沉积在主机内部或外部。

    SELECTIVE ETCH OF SILICON NITRIDE
    78.
    发明申请
    SELECTIVE ETCH OF SILICON NITRIDE 审中-公开
    硅酸盐的选择性蚀刻

    公开(公告)号：US20150079797A1

    公开(公告)日：2015-03-19

    申请号：US14479671

    申请日：2014-09-08

    Applicant: Applied Materials, Inc.

    Inventor： Zhijun Chen ,  Zihui Li ,  Anchuan Wang ,  Nitin K. Ingle ,  Shankar Venkataraman

    IPC: H01L21/02 ,  H01L21/3065

    CPC classification number: H01L21/02205 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/31116

    Abstract: A method of etching silicon nitride on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and a nitrogen-and-oxygen-containing precursor. Plasma effluents from two remote plasmas are flowed into a substrate processing region where the plasma effluents react with the silicon nitride. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon nitride while very slowly removing silicon, such as polysilicon. The silicon nitride selectivity results partly from the introduction of fluorine-containing precursor and nitrogen-and-oxygen-containing precursor using distinct (but possibly overlapping) plasma pathways which may be in series or in parallel.

    Abstract translation: 描述了在图案化的异质结构上蚀刻氮化硅的方法，并且包括由含氟前体和含氮和氧的前体形成的远程等离子体蚀刻。 来自两个远程等离子体的等离子体流出物流入基板处理区域，其中等离子体流出物与氮化硅反应。 等离子体流出物与图案化的异质结构反应以选择性地去除氮化硅，同时非常缓慢地除去硅，例如多晶硅。 氮化硅选择性部分取决于使用可能是串联或并联的不同（但可能重叠的）等离子体途径引入含氟前体和含氮和氧的前体。

    SEMICONDUCTOR PROCESSING SYSTEM AND METHODS USING CAPACITIVELY COUPLED PLASMA
    80.
    发明申请
    SEMICONDUCTOR PROCESSING SYSTEM AND METHODS USING CAPACITIVELY COUPLED PLASMA 有权
    半导体处理系统和使用电容耦合等离子体的方法

    公开(公告)号：US20130153148A1

    公开(公告)日：2013-06-20

    申请号：US13773067

    申请日：2013-02-21

    Applicant: Applied Materials, Inc.

    Inventor： Jang-Gyoo Yang ,  Matthew L. Miller ,  Xinglong Chen ,  Kien N. Chuc ,  Qiwei Liang ,  Shankar Venkataraman ,  Dmitry Lubomirsky

    IPC: H05H1/24

    CPC classification number: H05H1/24 ,  C23C16/45565 ,  C23C16/45585 ,  H01J37/32091 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32724 ,  H01L21/02274

    Abstract: Substrate processing systems are described that have a capacitively coupled plasma (CCP) unit positioned inside a process chamber. The CCP unit may include a plasma excitation region formed between a first electrode and a second electrode. The first electrode may include a first plurality of openings to permit a first gas to enter the plasma excitation region, and the second electrode may include a second plurality of openings to permit an activated gas to exit the plasma excitation region. The system may further include a gas inlet for supplying the first gas to the first electrode of the CCP unit, and a pedestal that is operable to support a substrate. The pedestal is positioned below a gas reaction region into which the activated gas travels from the CCP unit.

    Abstract translation: 描述了具有位于处理室内的电容耦合等离子体（CCP）单元的衬底处理系统。 CCP单元可以包括形成在第一电极和第二电极之间的等离子体激发区域。 第一电极可以包括允许第一气体进入等离子体激发区域的第一多个开口，并且第二电极可以包括允许活化气体离开等离子体激发区域的第二多个开口。 该系统还可以包括用于将第一气体供应到CCP单元的第一电极的气体入口和可操作以支撑衬底的基座。 基座位于气体反应区域的下方，活性气体从CCP单元行进。

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