公开(公告)号：JP2001034754A

公开(公告)日：2001-02-09

申请号：JP20522199

申请日：1999-07-19

Applicant: SONY CORP

Inventor： KAMATA MIKIO

IPC: G06T7/00 ,  A61B3/12 ,  G06K9/00

Abstract: PROBLEM TO BE SOLVED: To improve the authentication accuracy of the person in question in a authentication device using an iris. SOLUTION: This iris authentication device performing authentication on the basis of data generated from an iris 7 comprises iris data detecting means 21 and 25 detecting the state of an iris as data and organism detecting means 26 and 27 detecting that the iris is in an organic state, makes data detected by the iris data detecting means effective when the organism detecting means detect that the iris is in an organic state, and reliably prevents a non-organic iris fabricated by altering the iris pattern from being used to pretend to be a person in question and to receive authentication.

公开(公告)号：JPH06244219A

公开(公告)日：1994-09-02

申请号：JP2815093

申请日：1993-02-17

Applicant: SONY CORP

Inventor： KAMATA MIKIO

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/778

Abstract: PURPOSE:To decrease both the stray capacitance between a gate electrode and a source and drain electrode and the parasitic resistance between the source and drain and a channel part. CONSTITUTION:At least a channel layer 4, an electron feeding layer 5, source and drain electrodes 6s and 6d, and a gate electrode 7 are provided on a semiconductor substrate 3, the source and drain electrodes 6s and 6d are brought into contact with the side face of the channel layer 4, and the upper surfaces 6ss and 6ds of the source and the drain electrodes 6s and 6d are positioned almost on the same place surface of the bottom face 7b of the gate electrode 7 or lower than that.

公开(公告)号：JPH05315282A

公开(公告)日：1993-11-26

申请号：JP14108692

申请日：1992-05-07

Applicant: SONY CORP

Inventor： KAMATA MIKIO

IPC: H01L21/28 ,  H01L31/02 ,  H01L33/30 ,  H01L33/40 ,  H01S5/042 ,  H01S5/323

Abstract: PURPOSE:To provide a method by which a thermally stabilized and highly reliable ohmic electrode can be formed on a compound semiconductor layer containing Ga as a component. CONSTITUTION:The title method is composed of a process in which a metallic layer 14 containing Au is formed on a compound semiconductor layer 10 containing Ga as a component, process in which an alloy layer 20 is formed from the layer 14 by performing alloying treatment on the layer 14, process in which the surface layer 24 of the layer 20 is removed, and process in which an electrode forming material layer 26 is deposited on the layer 20 after the surface layer is removed.

公开(公告)号：JPH03218026A

公开(公告)日：1991-09-25

申请号：JP1312790

申请日：1990-01-23

Applicant: SONY CORP

Inventor： KAMATA MIKIO

IPC: H01L29/812 ,  H01L21/338

Abstract: PURPOSE:To realize high speed operation or high quality of an FET by setting the electron (carrier) potential of a source high, or setting the electron (carrier) potential on the drain side low. CONSTITUTION:A channel forming layer 12 composed of, e.g. n-type GaAs of comparatively low concentration is epitaxially grown on a semiinsulative substrate 11 composed of GaAs. A part of the layer 12 is eliminated, and a high concentration n type source 14s composed of, e.g. AlGaAs whose band gap is larger as compared with the layer 12 is epitaxially grown on the eliminated part. A hetero junction JHS is formed between the source 14s and the channel forming layer, i.e., a channel 14c. The potential in reference to electron, i.e., carrier, on the source 14s side of the junction JHS is set high as compared with the channel side. Thereby high speed electron is obtained in the source side part of a source channel, and high speed performance can be realized. The potential of electron on the drain side is lowered, thereby obtaining a high performance FET.

公开(公告)号：JPH0355853A

公开(公告)日：1991-03-11

申请号：JP19187489

申请日：1989-07-25

Applicant: SONY CORP

Inventor： KAMATA MIKIO

IPC: H01L21/338 ,  H01L29/812

Abstract: PURPOSE:To evade the generation of a parasitic Schottky junction in a field effect transistor of high electron mobility wherein circuit elements are isolated by means of a mesa type constitution, by a method wherein the stretching part of a gate electrode bridges flatly an island type operating region and other island type part separated from the island type operating region. CONSTITUTION:On an insulative or semiconductive substrate 1, the following are provided; an island type operating region 4 wherein at least channel layer 2 and a barrier layer whose band gap width is large as compared with the layer 2 are laminated in order and which region is isolated from other regions, the other island type part 5 isolated from the region 4, and a bridge part 7a wherein the stretching part 7a of a gate electrode 7 bridges almost flatly the island type region 4 and the other island type part 5 so as to separate from the side surface of a channel layer 2. For example, after a channel layer 2 of GaInAs and a barrier layer of AlInAs are laminated on the substrate 1, and thereon a source electrode 6s, a drain electrode 6d, and a gate electrode 7 are formed, photo resist covering a specified region is formed and mesa etching is executed, thereby forming the above-mentioned structure.

公开(公告)号：JPH0255942B2

公开(公告)日：1990-11-28

申请号：JP25051485

申请日：1985-11-08

Applicant: SONY CORP

Inventor： KAMATA MIKIO ,  HIRATA YOSHIMI

IPC: H01L21/339 ,  H01L27/148 ,  H01L29/76 ,  H01L29/762 ,  H01L29/768 ,  H01L29/772 ,  H04N5/335 ,  H04N5/341 ,  H04N5/357 ,  H04N5/3725

公开(公告)号：JPS6325717B2

公开(公告)日：1988-05-26

申请号：JP10081380

申请日：1980-07-23

Applicant: SONY CORP

Inventor： KAMATA MIKIO ,  HIRATA YOSHIMI

IPC: H01L29/762 ,  H01L21/339 ,  H01L27/148 ,  H01L29/768

公开(公告)号：JPS6358820A

公开(公告)日：1988-03-14

申请号：JP20315386

申请日：1986-08-29

Applicant: SONY CORP

Inventor： ISHIKAWA HIDETO ,  KAMATA MIKIO

IPC: H01L21/205

Abstract: PURPOSE:To accurately select the ratio of mixed crystal on a ternary mixed crystal and the like in an excellent reproducible manner by a method wherein the ratio (V)/(III) of the V-group gas quantity (V) and the III-group gas quantity (III) is brought in line with the prescribed ratio or above, and a vapor growth operation is performed. CONSTITUTION:In the organic metal vapor growth method, namely, MOCVD method, of the III-V compound semiconductor on which III-V compound semicon ductor layer 2 will be epitaxially grown on the substrate where vapor growth method will be performed such as an InP single crystal substrate 1, for example, the ratio (V)/(III) of the V-group gas quantity (V) and the III-group gas quantity is set at 350 or above, and the III-V compound semiconductor layer 2 is prepared by vapor-growth. As a result, the effect inflicting on the relation of the ratio of the supply quantity of the organic metal compound material of group III element of said (V)/(III) and the compositional ratio of the grown crystal can be averted, the approaching of the ratio of supply quantity and the compositional ratio of each organic metal compound raw material is detected, and the compositional ratio can be set by selecting said supply quantity in a stable manner.

公开(公告)号：JPS62248262A

公开(公告)日：1987-10-29

申请号：JP9182286

申请日：1986-04-21

Applicant: SONY CORP

Inventor： KAMATA MIKIO ,  MORI YOSHIFUMI

IPC: H01L29/812 ,  H01L21/338 ,  H01L29/43 ,  H01L29/778

Abstract: PURPOSE:To enable the operation at high speed by forming a third semiconductor layer having the quality of material different from a second semiconductor layer between the second semiconductor layer hetero-joined with a first semiconductor layer and a Schottky gate electrode. CONSTITUTION:A second semiconductor layer 2 having a relatively wide band gap is hetero-joined with a first semiconductor layer 3 having a relatively narrow band gap. A third semiconductor layer 4 having the quality of material different from the second semiconductor layer 2 is shaped on the opposite side of the second semiconductor layer 2. A Schottky gate electrode 1 is formed to the third semiconductor layer 4, and said second semiconductor layer 2 is used as a channel layer. According to such constitution, operation at high speed is enabled, and gate leakage currents can be reduced.

公开(公告)号：JPS61253851A

公开(公告)日：1986-11-11

申请号：JP9539785

申请日：1985-05-07

Applicant: SONY CORP

Inventor： KAMATA MIKIO

IPC: H01L27/095 ,  H01L21/822 ,  H01L27/04 ,  H01L27/088

Abstract: PURPOSE:To stabilize the current and voltage characteristics, by forming a resistor element on a compound semiconductor substrate such that the current flowing direction thereof corresponds to the direction opposed to the mesa. CONSTITUTION:A saturation-type resistor element 2 is provided in a region located between a conductive section 6 to which a drain voltage Vd is applied and a conductive section 4 to which an output line 10 is connected. The resistor element 2 has a width WR along the direction orthogonal to the current flowing direction on the surface of a substrate, while its channel length along the current flowing direction is defined for example by the distance LR between electrodes. An FET 3 has a gate electrode 7 connected to an input line 9 and is provided in a region located between a conductive section 5 connected to the ground 11 and a conductive section 4 connected to an output line 10. The FET 4 in this region is provided with a gate width WT. Thus, the resistor element 2 is formed such that the direction opposed to the mesa corresponds to the current direction. This enables the formation of an improved integrated circuit which has excellent saturation properties and can well control the resistor element by the distance LR between the elements, and which requires a small amount of current.