MICROELECTRONIC DEVICE WITH PILLARS HAVING FLARED ENDS

    公开(公告)号:US20210375812A1

    公开(公告)日:2021-12-02

    申请号:US17404958

    申请日:2021-08-17

    Abstract: A microelectronic device has a die with a die conductor at a connection surface. The microelectronic device includes a pillar electrically coupled to the die conductor, and a head electrically coupled to the pillar. The pillar has a die-side flared end at a die end of the pillar; the pillar widens progressively along the die-side flared end, and extends outward by more than a lesser of half a thickness of the die conductor and half a lateral width of the pillar midway between a die end and a head end. The pillar has a head-side flared end at a head end of the pillar; the pillar widens progressively along the die-side flared end, and extends outward by a distance that is greater than a lesser of half a thickness of the head and half the lateral width of the pillar. Methods of forming the microelectronic device are disclosed.

    INTEGRATED CAPACITOR WITH EXTENDED HEAD BUMP BOND PILLAR

    公开(公告)号:US20210375731A1

    公开(公告)日:2021-12-02

    申请号:US17404970

    申请日:2021-08-17

    Abstract: A microelectronic device has a die with a first electrically conductive pillar, and a second electrically conductive pillar, mechanically coupled to the die. The microelectronic device includes a first electrically conductive extended head electrically coupled to the first pillar, and a second electrically conductive extended head electrically coupled to the second pillar. The first pillar and the second pillar have equal compositions of electrically conductive material, as a result of being formed concurrently. Similarly, the first extended head and the second extended head have equal compositions of electrically conductive material, as a result of being formed concurrently. The first extended head provides a bump pad, and the second extended head provides at least a portion of a first plate of an integrated capacitor. A second plate may be located in the die, between the first plate and the die, or on an opposite of the first plate from the die.

    Pre-Molded Leadframes in Semiconductor Devices

    公开(公告)号:US20210210453A1

    公开(公告)日:2021-07-08

    申请号:US17210380

    申请日:2021-03-23

    Abstract: In one instance, a semiconductor package includes a metal leadframe having a first plurality of openings extending partially into the leadframe from the first side and a second plurality of openings extending partially into the leadframe from the second side together forming a plurality of leads. A pre-mold compound is positioned in the second plurality of openings that at least partially supports the plurality of leads. The semiconductor package has a plurality of bumps extending from the landing sites to a semiconductor die and a molding compounding at least partially covering the plurality of bumps and the metal leadframe. Other packages and methods are disclosed.

    LIDAR IMAGING RECEIVER
    74.
    发明申请

    公开(公告)号:US20200166645A1

    公开(公告)日:2020-05-28

    申请号:US16203170

    申请日:2018-11-28

    Abstract: Described examples include a receiver having a beam splitter arranged to receive reflected light from a scene illuminated by a transmitted light signal, the beam splitter structured to provide at least two copies of the reflected light including at least two regions having sub-regions, wherein the sub-regions are not adjacent to each other. The receiver also includes a first sensor array arranged to receive one region of the reflected light and provide an output representative of that region of the reflected light. The receiver also includes a second sensor array arranged to receive the other region of the reflected light and provide a second output representative of the second region of the reflected light. The receiver also includes a combiner arranged to receive the outputs of the sensor arrays to provide a combined representation of the reflected light.

    Shaped Interconnect Bumps in Semiconductor Devices

    公开(公告)号:US20190109110A1

    公开(公告)日:2019-04-11

    申请号:US16103839

    申请日:2018-08-14

    Abstract: In one instance, a semiconductor package includes a lead frame and a semiconductor die mounted to the lead frame via a plurality of bumps that are shaped or tapered. Each of the plurality of bumps includes a first end connected to the semiconductor die and an opposing, second end connected to the lead frame. The first end has an end surface area A1. The second end has an end surface area A2. The end surface area A1 of the first end is less than the end surface area A2 of the second end. Other aspects are disclosed.

    X-ray sensor and signal processing assembly for an X-ray computed tomography machine
    77.
    发明授权
    X-ray sensor and signal processing assembly for an X-ray computed tomography machine 有权
    用于X射线计算机断层摄影机的X射线传感器和信号处理组件

    公开(公告)号:US09354186B2

    公开(公告)日:2016-05-31

    申请号:US14187905

    申请日:2014-02-24

    Abstract: An apparatus having an X-ray sensor assembly with X-ray blocking pixels divided by X-ray transmitting gaps with the X-ray blocking pixels casting an X-ray blocking shadow; and a die containing signal processing electronics, with the signal processing electronics positioned substantially entirely within the X-ray blocking shadow. A method for detecting the alignment between the X-ray sensor assembly and the die is disclosed. Also disclosed is an X-ray computed tomography machine having a printed circuit board (“PCB”), a die embedded in the PCB, and a signal source wherein signals are routed to and from the die by traces on at least one of the surfaces of the PCB.

    Abstract translation: 一种具有X射线遮挡像素的X射线传感器组件的X射线传感器组件的装置,X射线遮挡像素被X射线透射间隙除以X射线遮挡像素投射X射线遮挡阴影; 以及包含信号处理电子器件的管芯,信号处理电子器件基本上完全位于X射线阻挡阴影内。 公开了一种用于检测X射线传感器组件和模具之间的对准的方法。 还公开了一种X射线计算机断层摄影机,其具有印刷电路板(“PCB”),嵌入在PCB中的管芯,以及信号源,其中信号通过至少一个表面上的迹线被引导到管芯和从管芯 的PCB。

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