Reception circuit
    71.
    发明专利
    Reception circuit 审中-公开
    接收电路

    公开(公告)号:JP2005094502A

    公开(公告)日:2005-04-07

    申请号:JP2003326684

    申请日:2003-09-18

    Abstract: PROBLEM TO BE SOLVED: To prevent the occurrence of saturated operations in the frequency conversion circuit of a reception circuit included in a radio communication device.
    SOLUTION: In the reception circuit, an antenna 11 receives a high-frequency signal in a prescribed frequency band. A level changing means 13 changes the signal level of the high-frequency signal received by the antenna. A post-stage circuit 14 applies prescribed signal processing to the high-frequency signal whose signal level is changed in the level changing means 13. A detector 32 detects the signal level of the high-frequency signal to which the signal processing is applied in the post-stage circuit 14. A control unit 33 sets a rate of change of the high-frequency signal in the level changing means 13 on the basis of the signal level of the high-frequency signal detected by the detector 32, so that the signal level of the high-frequency signal detected by the detector 32 does not become larger than a prescribed value.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:为了防止在无线电通信装置中包括的接收电路的频率转换电路中发生饱和操作。 解决方案:在接收电路中,天线11接收规定频带的高频信号。 电平改变装置13改变由天线接收的高频信号的信号电平。 后级电路14对电平改变装置13中的信号电平改变的高频信号应用规定的信号处理。检测器32检测在信号处理中施加了信号处理的高频信号的信号电平 后级电路14.控制单元33基于由检测器32检测的高频信号的信号电平来设置电平改变装置13中的高频信号的变化率,使得信号 由检测器32检测的高频信号的电平不会变得大于规定值。 版权所有(C)2005,JPO&NCIPI

    RADIO FREQUENCY LOW NOISE AMPLIFIERS
    76.
    发明公开

    公开(公告)号:US20230370029A1

    公开(公告)日:2023-11-16

    申请号:US18359718

    申请日:2023-07-26

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a programmable input impedance circuit for a radio frequency (RF) low noise amplifier (LNA) including a high impedance mode circuit and a low impedance mode circuit. The high impedance mode circuit includes an inductor-degenerated transconductor transistor, an inductor selectively coupled between a source of the inductor-degenerated transconductor transistor and a ground, and a capacitor coupled between a gate of the inductor-degenerated transconductor transistor and the source of the inductor-degenerated transconductor transistor. The low impedance mode circuit includes a shunt resistor selectively coupled between an RF input source and an alternating current (AC) ground.

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