公开(公告)号：WO2015073498A1

公开(公告)日：2015-05-21

申请号：PCT/US2014/065153

申请日：2014-11-12

Applicant: AERO SYSTEMS ENGINEERING, INC.

Inventor： LONG, Dean, Frederick ,  SIMON, Kenneth, William ,  RADINZEL, Grant, August

IPC: G01M15/14

CPC classification number: G01M15/14

Abstract: Systems and methods for determining turbine engine system stability encompass measuring or otherwise determining values of performance parameters, storing a data set of such values in memory, generating a stability indicator, and displaying the stability indicator on an operator interface. The stability indicator is generated by a processor operating in data communication with the computer memory, utilizing customized software algorithms to remove high frequency components, apply an adaptive filter to adjust selected parameters according to a target value of a selected target parameter, and apply a stochastic filters to estimate true values of the selected parameters, based on the remaining variation.

Abstract translation: 用于确定涡轮发动机系统稳定性的系统和方法包括测量或以其他方式确定性能参数的值，将这些值的数据集存储在存储器中，产生稳定性指示器，以及在操作者界面上显示稳定性指示符。 稳定性指示器由与计算机存储器的数据通信操作的处理器产生，利用定制的软件算法去除高频分量，应用自适应滤波器根据所选目标参数的目标值来调整所选参数，并应用随机 过滤器，以根据剩余的变化估计所选参数的真实值。

公开(公告)号：WO2013138927A1

公开(公告)日：2013-09-26

申请号：PCT/CA2013/050197

申请日：2013-03-14

Applicant: ADAMSON SYSTEMS ENGINEERING INC.

Inventor： ADAMSON, Alan Brock ,  CABOT, Ben

IPC: H04R3/12 ,  A63J3/00 ,  H02J3/00 ,  H03F3/68 ,  H03G3/00 ,  H04S7/00

CPC classification number: H04R3/12 ,  H02J7/00 ,  H02J9/06 ,  H04R3/00 ,  H04R27/00 ,  H04R29/007 ,  H04R2201/028 ,  H04R2227/003

Abstract: A control and distribution system provides electrical power distribution, audio signal distribution, and control signal distribution to one or more audio components, such as a powered loudspeaker element or a signal conditioning device such as a rack-mounted amplifier. Embodiments allow for the monitoring and/or control of parameters and/or components at or near the endpoint of the system. These parameters or components include low-level parameters associated with the external audio devices, as opposed to merely higher level parameters of the system. The control and distribution system may include an uninterrupted power source for providing power in an online or offline mode to selected components of the external audio devices. In some embodiments, online backup power is provided to low-power components without providing power to amplifiers within the external audio devices.

Abstract translation: 控制和分配系统向一个或多个音频组件（例如有源扬声器元件或诸如机架式放大器的信号调节装置）提供电力分配，音频信号分配和控制信号分配。 实施例允许监视和/或控制系统端点处或附近的参数和/或组件。 这些参数或组件包括与外部音频设备相关联的低级参数，而不仅仅是系统的更高级别的参数。 控制和分配系统可以包括用于在在线或离线模式中为外部音频设备的选定部件提供电力的不间断电源。 在一些实施例中，将在线备用电力提供给低功率组件，而不向外部音频设备内的放大器提供电力。

公开(公告)号：WO2011060535A1

公开(公告)日：2011-05-26

申请号：PCT/CA2010/001823

申请日：2010-11-19

Applicant: ADAMSON SYSTEMS ENGINEERING INC. ,  ADAMSON, Alan Brock ,  HLIBOWICKI, Stefan Roman

Inventor： ADAMSON, Alan Brock ,  HLIBOWICKI, Stefan Roman

IPC: G01S5/26 ,  G01S5/22 ,  H04R5/02

CPC classification number: G01S5/22 ,  H04R29/002 ,  H04R29/007

Abstract: A method for identifying and recording the relative positions of loudspeakers in an array with respect to one another using amplifiers connected on a network.

Abstract translation: 使用在网络上连接的放大器来相对于彼此来识别和记录阵列中的扬声器的相对位置的方法。

公开(公告)号：WO2005008410A3

公开(公告)日：2005-01-27

申请号：PCT/US2004/022126

申请日：2004-07-12

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： HANSEN, Craig ,  MOUSSOURIS, John ,  MASSALIN, Alexia

IPC: G06F12/00

Abstract: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.

公开(公告)号：WO1998004970A1

公开(公告)日：1998-02-05

申请号：PCT/US1997012651

申请日：1997-07-21

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  LAIDIG, Thomas, L.

IPC: G06F09/00

CPC classification number: G06F17/5081

Abstract: A system for processing geometry which reduces the amount of memory spaces while improving the processing speed. The system delivers vertices in sequence to a vertex queue (70) so that data in the vertex queue is freed as it is delivered and only minimal intermediate results are stored. By this incremental evaluation, less memory space is needed. In another aspect of the invention the vertices are maintained in the proper sequence so that sorting operation can be eliminated. A sorted vertex queue (70) and an unsorted vertex list (72) are utilized so that resorting of the entire vertex list may be prevented. In addition, a compressed format (34) for storing geometry is utilized based on the fact that much information can be rederived from a sorted and reduced vertex queue.

Abstract translation: 一种用于处理几何的系统，其在提高处理速度的同时减少存储空间的量。 系统将顶点顺序传递到顶点队列（70），以便顶点队列中的数据在传递时释放，只存储最小的中间结果。 通过这种增量评估，需要更少的内存空间。 在本发明的另一方面中，顶点以适当的顺序保持，从而可以消除排序操作。 利用排序的顶点队列（70）和未排序的顶点列表（72），从而可以防止整个顶点列表的撤回。 此外，基于可以从排序和缩小的顶点队列重新获取大量信息的事实，利用用于存储几何的压缩格式（34）。

公开(公告)号：WO1996023353A1

公开(公告)日：1996-08-01

申请号：PCT/US1995015219

申请日：1995-11-21

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  CORRY, Alan, G.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: H03H17/06

CPC classification number: H03H17/0275 ,  H03H17/06

Abstract: A compact FIR filter uses one or both of a compact address sequencer and a compact multiplier/accumulator. The address sequencer exploits certain symmetry properties existing between different phases of a polyphase FIR filter in order to reduce coefficient storage and simplify address sequencing. The multiplier/accumulator is capable of performing two multiply/accumulate operations per clock cycle, avoiding in certain instances the need to add a second multiplier/accumulator. The area required to realize an FIR filter for performing real-time filter is therefore reduced.

Abstract translation: 紧凑型FIR滤波器使用紧凑型地址排序器和紧凑型乘法器/累加器中的一个或两者。 地址序列器利用多相FIR滤波器的不同相之间存在的某些对称性，以减少系数存储并简化地址排序。 乘法器/累加器能够在每个时钟周期执行两次乘法/累加操作，避免在某些情况下需要添加第二个乘法器/累加器。 因此，实现用于执行实时滤波器的FIR滤波器所需的面积减少。

公开(公告)号：WO1996017287A1

公开(公告)日：1996-06-06

申请号：PCT/US1995012416

申请日：1995-09-29

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  CORRY, Alan, G. ,  SUTHERLAND, Robert, A.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: G06F01/03

CPC classification number: H03C3/00 ,  G06F1/0328

Abstract: A direct digital synthesizer (DDS) for generating a waveform generates a sequence of n-bit phase signals representing phase of the waveform, wherein n is an integer greater than zero. Each n-bit phase signal comprises a phase estimate signal and a phase error signal. The phase estimate signal comprises a most-significant m bits of the n-bit quantity (0

Abstract translation: 用于产生波形的直接数字合成器（DDS）产生表示波形相位的n位相位信号的序列，其中n是大于零的整数。 每个n位相位信号包括相位估计信号和相位误差信号。 相位估计信号包括n比特量（0

公开(公告)号：WO1995001672A1

公开(公告)日：1995-01-12

申请号：PCT/US1994004900

申请日：1994-05-02

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  MICHEL, Jean, Yves

IPC: H03M01/36

CPC classification number: H03M1/204 ,  H03M1/365

Abstract: A two-stage flash analog-to-digital signal converter is described. The first stage has a voltage divider network and a set of amplifiers that perform an initial interpolation. The initial interpolation results are directly coupled, i.e., no resistive or capacitive elements, to a second stage comprising a set of comparators having multiple inputs. The multiple inputs of the second stage comparators are weightily coupled to the first stage amplifiers in a manner so as to cause the second stage comparators to generate a digital representation of the analog signal.

Abstract translation: 描述了两级​​闪存模数转换器。 第一级具有分压网络和一组执行初始插值的放大器。 初始插值结果直接耦合到包括具有多个输入的一组比较器的第二级的电阻或电容元件。 第二级比较器的多个输入以这样的方式重叠耦合到第一级放大器，以便使第二级比较器产生模拟信号的数字表示。

公开(公告)号：WO1993020482A1

公开(公告)日：1993-10-14

申请号：PCT/US1993003126

申请日：1993-03-29

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  CHEN, Jang, Fung ,  MATTHEWS, James, A.

IPC: G03F07/20

CPC classification number: G03F7/70466 ,  G03F7/2022

Abstract: A method of printing a sub-resolution device feature (16) having first and second edges spaced in close proximity to one another on a semiconductor substrate (20) includes the steps of first depositing a radiation-sensitive material on the substrate, then providing a first mask image segment (11) which corresponds to the first edge. The first mask image segment is then exposed with radiation (10) using an imaging tool (12) to produce a first pattern edge gradient (14). The first pattern edge gradient defines the first edge of the feature in the material. A second mask image segment (13) is then provided corresponding to the second feature edge. This second mask image segment is exposed to radiation (10) to produce a second pattern edge gradient (17) which defines the second edge of the feature. Once the radiation-sensitive material has been developed, the two-dimensional feature is reproduced on the substrate.

Abstract translation: 印刷具有在半导体衬底（20）上彼此靠近彼此间隔开的第一和第二边缘的子分辨率器件特征（16）的方法包括以下步骤：首先在衬底上沉积辐射敏感材料，然后提供 第一掩模图像段（11），其对应于第一边缘。 然后使用成像工具（12）用辐射（10）将第一掩模图像段曝光以产生第一图案边缘梯度（14）。 第一个图案边缘渐变定义材料中特征的第一个边缘。 然后对应于第二特征边缘提供第二掩模图像段（13）。 该第二掩模图像段暴露于辐射（10）以产生限定特征的第二边缘的第二图案边缘梯度（17）。 一旦辐射敏感材料已经开发出来，二维特征就在基片上再现。

公开(公告)号：WO1993008599A1

公开(公告)日：1993-04-29

申请号：PCT/US1992008905

申请日：1992-10-19

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  MATTHEWS, James, A.

IPC: H01L23/00

CPC classification number: H01L29/66272 ,  H01L29/1004 ,  H01L29/36 ,  H01L29/732 ,  Y10S148/01

Abstract: A bipolar transistor having an emitter (25), a base (31), and a collector (30) includes an intrinsic base (33) region having narrow side areas (p-) and a wider central area (37). The side areas are located adjacent to the extrinsic base region (31), while the central area (37) is disposed underneath the emitter (25). The lateral doping profile of the base is tailored so that the doping concentrations in the extrinsic region (31) and the central area (37) are relatively high compared to the doping concentration of the narrow side areas (p-) of the intrinsic base (33). The combination of the narrow side areas (p-) and the lateral base doping profile constrains the depletion region within the base thereby lowering punch-through voltage of the transistor without loss of beta.

Abstract translation: 具有发射极（25），基极（31）和集电极（30）的双极晶体管包括具有窄侧面积（p-）和较宽中心区域（37）的本征基极（33）区域。 侧面区域邻近外部基极区域（31）定位，而中心区域（37）设置在发射器（25）的下方。 定制基底的横向掺杂分布，使得非本征区域（31）和中心区域（37）中的掺杂浓度相对于本征基底的窄边区域（p-）的掺杂浓度相对较高 33）。 窄边区域（p-）和横向基极掺杂曲线的组合限制了基极内的耗尽区域，从而降低晶体管的穿通电压而不损失β。