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公开(公告)号：KR101300587B1
公开(公告)日：2013-08-28
申请号：KR1020090121573
申请日：2009-12-09
Applicant: 한국전자통신연구원
IPC: H01L21/28
CPC classification number: H01L21/76898 , H01L21/2885
Abstract: 본 발명은 반도체 소자의 제조 방법에 관한 것으로, 하전된 금속 입자를 전기력 또는 자기력을 이용해 이동시켜서 비아 홀을 충진하므로 비아 홀의 하부에서부터 위로 충진이 이루어져서 비아 홀의 내부에 공극이 발생하지 않거나 최소화되고, 종래 기술에 따른 구리 전기도금 방식과 비교하면 본 발명은 매우 빠른 시간 내에 크고 깊은 비아 홀을 금속 입자로 채울 수 있어서 실리콘 관통 비아(TSV)의 공정 가격 및 공정 시간을 단축시키며, 수지성분이 많이 포함되어 있는 메탈 페이스트를 사용하는 건식 충진 방식과 비교하면 본 발명은 하전된 금속 입자를 사용함으로서 더 밀한 TSV 금속 배선을 형성할 수 있는 이점이 있다.
TSV(through silicon via), 비아 충진(via filling), 3차원 패키징(3D packaging), 금속 입자(metal particle)-
公开(公告)号：KR1020130057072A
公开(公告)日：2013-05-31
申请号：KR1020110122816
申请日：2011-11-23
Applicant: 한국전자통신연구원
CPC classification number: H01L51/0545 , B05D5/00 , B32B3/30 , H01L51/052 , H01L51/0529 , H01L51/0562 , H01L2251/105 , Y10T428/24521
Abstract: PURPOSE: An organic thin film layer, a manufacturing method thereof, and an organic thin film transistor are provided to easily control the thickness of the organic thin film layer by forming a first film and a second film. CONSTITUTION: A first film is formed on a substrate(S11). A recess region is formed on the first film by using a pattern mold(S13). The first film is hardened(S15). The pattern mold is removed from the first film which is hardened(S17). A second film is formed on the first film(S21). The second film is planarized by using a blank mold(S23). The second film is hardened(S25). The blank mold is removed(S27). [Reference numerals] (S11) Form a first film on a substrate; (S13) Form recess regions on the first film by using a pattern mold; (S15) Harden the first film; (S17) Remove the pattern mold; (S21) Form a second film on the first film; (S23) Planarize the second film by using a blank mold; (S25) Harden the second film; (S27) Remove the blank mold
Abstract translation: 目的：提供有机薄膜层，其制造方法和有机薄膜晶体管，以通过形成第一薄膜和第二薄膜来容易地控制有机薄膜层的厚度。 构成：在基板上形成第一膜（S11）。 通过使用图案模具在第一膜上形成凹部（S13）。 第一片硬化（S15）。 图案模具从被硬化的第一薄膜上去除（S17）。 在第一胶片上形成第二胶片（S21）。 通过使用空模使第二膜平坦化（S23）。 第二片硬化（S25）。 除去空白模具（S27）。 （附图标记）（S11）在基板上形成第一膜; （S13）通过使用图案模具在第一膜上形成凹部; （S15）硬化第一片; （S17）取下图案模具; （S21）在第一膜上形成第二膜; （S23）使用空白模具平面化第二膜; （S25）硬化第二片; （S27）取下模具
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公开(公告)号：KR1020120061424A
公开(公告)日：2012-06-13
申请号：KR1020100122740
申请日：2010-12-03
Applicant: 한국전자통신연구원
IPC: H01L21/027 , B41N1/06 , B41M1/10
CPC classification number: B41N1/00 , B41M1/10 , B41N1/06 , H01L21/0274 , G03F7/0002 , G03F7/12
Abstract: PURPOSE: An intaglio printing plate which includes an auxiliary pattern and a manufacturing method thereof are provided to improve accuracy of a pattern by uniformly filling ink on the edge of the pattern. CONSTITUTION: A pattern to be printed is located on a pattern part(100). A non-pattern part is arranged on a region which excludes the pattern part. An auxiliary pattern part(210) includes a repetition pattern of a predetermined shape formed within the pattern part. A part of the pattern part is divided by a pattern structure formed by the auxiliary pattern part. A cross sectional surface of a repetition pattern part has a mesh structure.
Abstract translation: 目的：提供一种包括辅助图案的凹版印刷版及其制造方法，以通过在图案的边缘均匀地填充墨来提高图案的精度。 构成：要打印的图案位于图案部分（100）上。 非图案部分布置在排除图案部分的区域上。 辅助图案部分（210）包括形成在图案部分内的预定形状的重复图案。 图案部分的一部分被由辅助图案部分形成的图案结构划分。 重复图案部分的横截面具有网格结构。
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公开(公告)号：KR101104248B1
公开(公告)日：2012-01-11
申请号：KR1020080132235
申请日：2008-12-23
Applicant: 한국전자통신연구원
IPC: H01L21/8238 , H01L21/336 , B82Y40/00
CPC classification number: H01L29/785 , H01L27/1292 , H01L29/41791 , H01L29/66795 , H01L51/0554
Abstract: 본 발명은 자기 정렬 전계 효과 트랜지스터 구조체에 관한 것이다. 본 발명의 실시예에 따른 자기 정렬 전계 효과 트랜지스터 구조체는 기판 상에 배치된 활성영역패턴, 활성영역패턴을 사이에 두고 서로 대향하는 제1 게이트 전극 및 제2 게이트 전극, 그리고 활성영역패턴에 연결되고 제1 및 제2 게이트 전극들을 연결하는 선에 대하여 대칭되게 배치된 소스 전극 및 드레인 전극을 포함하되, 제1 및 제2 게이트 전극들, 그리고 소스 및 드레인 전극들은 기판의 동일평면상에 배치된다.
트랜지스터, 반도체, 표시소자, 게이트 전극, 기생 캐패시턴스,-
公开(公告)号：KR1020110070781A
公开(公告)日：2011-06-24
申请号：KR1020100117612
申请日：2010-11-24
Applicant: 한국전자통신연구원
CPC classification number: G06K19/0704 , G06K19/0723 , H02J7/0029
Abstract: PURPOSE: An RFID(Radio Frequency ID) tag device equipped with a charge function is provided to recognize the RFID tag in a long distance and prevent the reducing of the recognition ratio due to the shortage of the electric power supply. CONSTITUTION: A charge unit(220) charges the specified voltage. The DC power supply unit (211) generates the power source from the RF signal. A block unit(214) connects/blocks the power source between the DC power supply and the power supply unit. An over voltage prevention part(215) is connected in the output terminal of the DC power supply and connected in parallel with the charge unit to prevent the over voltage of the charge unit. The power supply unit is connected to the output terminal of the DC power supply. The charge unit is charged with the power source generated from the DC power supply unit and the 'the external power source generated from the power supply unit.
Abstract translation: 目的：提供一种配备充电功能的RFID（射频识别）标签设备，用于长距离识别RFID标签，防止由于电源不足导致的识别率降低。 构成：充电单元（220）对指定的电压充电。 直流电源单元（211）从RF信号生成电源。 块单元（214）在DC电源和电源单元之间连接/阻断电源。 在直流电源的输出端子上连接有过电压保护部（215），与充电部并联连接，以防止充电部的过电压。 电源单元连接到直流电源的输出端子。 充电单元对从直流电源单元产生的电源和从电源单元产生的外部电源充电。
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Patent Agency Ranking
公开(公告)号：KR1020110064828A
公开(公告)日：2011-06-15
申请号：KR1020090121573
申请日：2009-12-09
Applicant: 한국전자통신연구원
IPC: H01L21/28
CPC classification number: H01L21/76898 , H01L21/2885
Abstract: PURPOSE: A method for forming a semiconductor device is provided to move charged metal particles by electric power or magnetic power to fill a via hole, thereby minimizing voids inside the via hole. CONSTITUTION: A via hole is formed in a semiconductor substrate(101). An insulating film is formed on the inner sidewall of the via hole. A diffusion preventing film(109) is formed on the semiconductor substrate and the inner sidewall of the via hole. Electrically charged metal particles are diffused in a solvent(111). The metal particles are moved using electric power or magnetic power so that the via hole is filled with metal particles(113,115).
Abstract translation: 目的：提供一种用于形成半导体器件的方法，通过电力或磁力来移动带电金属颗粒以填充通孔，从而最小化通孔内部的空隙。 构成：在半导体衬底（101）中形成通孔。 绝缘膜形成在通孔的内侧壁上。 在半导体衬底和通孔的内侧壁上形成扩散防止膜（109）。 带电的金属颗粒在溶剂（111）中扩散。 使用电力或磁力使金属颗粒移动，使得通孔填充有金属颗粒（113,115）。
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公开(公告)号：KR101039559B1
公开(公告)日：2011-06-09
申请号：KR1020080101447
申请日：2008-10-16
Applicant: 한국전자통신연구원 , 경희대학교 산학협력단
IPC: C23C26/00
Abstract: 본 발명은 전기분무법을 이용한 유기박막의 제조방법에 관한 것으로, 본 발명에 따른 유기박막의 제조방법은 증착하고자 하는 유기물질을 용매 중에 용해시켜 전기분무 용액을 준비하는 단계; 상기 전기분무 용액을 전압을 인가한 상태에서 전기분무의 노즐을 통해 분사시키는 단계; 및 전압에 의해 용매와 유기물질이 분리되고, 비행도중 용매는 증발되고, 유기물질은 기체상태의 이온으로 기판 상에 증착되는 단계를 포함한다. 본 발명에 따른 유기박막의 제조방법은 크기에 관계없이 대면적 유기박막이 제작될 수 있으며, 또한 패터닝도 가능하다.
전기분무, 유기박막, 패터닝-
公开(公告)号：KR1020110039192A
公开(公告)日：2011-04-15
申请号：KR1020100096841
申请日：2010-10-05
Applicant: 한국전자통신연구원
CPC classification number: H01L33/38 , H01L33/10 , H01L33/145 , H01L33/405 , H01L33/44 , H01L2933/0008
Abstract: PURPOSE: An inorganic light emitting device and a manufacturing method thereof are provided to simplify the manufacturing process and reduce the manufacturing cost by implementing the inorganic light emitting device without using a transparent electrode which requires complex process and high expense. CONSTITUTION: A patterned metal electrode(22) is formed on a substrate(21). An insulating layer(23) is spread on the patterned metal electrode. A fluorescent layer(24) for the emitting light is spread on the insulating layer. A mirror surface(27) for reflecting the light is spread on the fluorescent layer. A passivation layer(26) for the protecting the device is spread on the mirror surface.
Abstract translation: 目的：提供无机发光器件及其制造方法，以通过实施无机发光器件来简化制造工艺并降低制造成本，而不使用需要复杂工艺和高成本的透明电极。 构成：图案化的金属电极（22）形成在基板（21）上。 绝缘层（23）被铺展在图案化的金属电极上。 用于发光的荧光层（24）扩散在绝缘层上。 用于反射光的镜面（27）扩散在荧光层上。 用于保护器件的钝化层（26）被扩散在镜面上。
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公开(公告)号：KR1020100058067A
公开(公告)日：2010-06-03
申请号：KR1020080116743
申请日：2008-11-24
Applicant: 한국전자통신연구원
IPC: H01L21/336 , H01L21/027
CPC classification number: H01L21/28114 , G03F7/095 , H01L21/31051
Abstract: PURPOSE: A manufacturing method of a semiconductor device is provided to obtain uniform a leg part by adjusting the length and width of the leg part of a T-shape gate electrode. CONSTITUTION: A first photosensitive pattern is formed on a substrate(100). A second photosensitive layer covering the first photosensitive pattern and a third photosensitive layer covering the second photosensitive layer are formed. A third photosensitive pattern(132) with a first opening is formed. The first photosensitive pattern is exposed by leveling the second photosensitive layer. A second photosensitive layer with a second opening is formed. A T-shape gate electrode including a leg part(142) and a head part(144) which fill the second opening is formed.
Abstract translation: 目的：提供一种半导体器件的制造方法，通过调整T形栅电极的腿部的长度和宽度来获得均匀的腿部。 构成：在基板（100）上形成第一感光图案。 形成覆盖第一感光图案的第二感光层和覆盖第二感光层的第三感光层。 形成具有第一开口的第三感光图案（132）。 第一感光图案通过调平第二感光层来曝光。 形成具有第二开口的第二感光层。 形成包括支撑部分（142）和填充第二开口的头部（144）的T形栅电极。
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公开(公告)号：KR100772926B1
公开(公告)日：2007-11-02
申请号：KR1020060094046
申请日：2006-09-27
Applicant: 한국전자통신연구원
Abstract: A conductive polymer composition, a conductive polymer thin film prepared by using the composition, and an organic electronic device containing the thin film are provided to improve coating property and electrical characteristics. A conductive polymer composition comprises a polythiophene-based conductive polymer aqueous solution; 0.02-5.0 parts by weight of a surface tension controller (surfactant) having both hydrophobicity and hydrophilicity based on the weight of the conductive polymer; and 1-99 parts by weight of a polar solvent. Preferably the polythiophene-based conductive polymer is the poly(3,4-ethylene dioxythiophene) represented by the formula 1 or a mixture of the poly(3,4-ethylene dioxythiophene) represented by the formula 1 and the poly(4-styrene sulfonate) represented by the formula 2, wherein n and m are 5-10,000.
Abstract translation: 提供导电聚合物组合物，通过使用该组合物制备的导电聚合物薄膜和含有薄膜的有机电子器件以改善涂层性能和电特性。 导电聚合物组合物包含聚噻吩基导电聚合物水溶液; 基于导电聚合物的重量，0.02-5.0重量份具有疏水性和亲水性的表面张力控制剂（表面活性剂）; 和1-99重量份的极性溶剂。 优选地，聚噻吩基导电聚合物是由式1表示的聚（3,4-亚乙基二氧噻吩）或由式1表示的聚（3,4-亚乙基二氧噻吩）与聚（4-苯乙烯磺酸盐） ），其中n和m为5-10,000。
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