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    COMMUNICATION CONTROL EQUIPMENT
    82.
    发明专利
    COMMUNICATION CONTROL EQUIPMENT 失效

    公开(公告)号：JPS62161231A

    公开(公告)日：1987-07-17

    申请号：JP18226085

    申请日：1985-08-20

    Applicant: FUJITSU LTD

    Inventor： MITA TERUYOSHI

    IPC: H04J3/08 ,  G06F13/00 ,  H04J3/22 ,  H04L13/00 ,  H04L29/00 ,  H04L29/02

    Abstract: PURPOSE:To allow the titled equipment to cope with data transmission by reading a data stored in a fixed length buffer at reception when an effective bit length of a variable length buffer is maximum, and minimizing the effective bit length of the variable length buffer at transmission when the data is stored in the fixed length buffer. CONSTITUTION:A bit data RD1 of each channel is stored once in the variable length buffer 10 at reception and sent to a communication control processing section as a data RD2 at the reception. On the other hand, an X-bit data included at each frame by 1-bit is stored in the fixed length buffer 11 at each occasion, a changeover switch 14 is turned to the position (b) at each processing unit and the information of X-bit is outputted as a consecutive bit data. A transmission buffer section 8 applies control to send the X-bit information stored once in the fixed length buffer 12 as X-bit at each frame at the transmission, the channel data is stored tentatively in the variable length buffer 13 and a transmission data SD2 is sent in the reverse operation as the reception. Thus, the X-bit information transfer is attained.

    AUTOMATIC LOOP BACK RELEASE SYSTEM
    84.
    发明专利
    AUTOMATIC LOOP BACK RELEASE SYSTEM 失效

    公开(公告)号：JPS6242638A

    公开(公告)日：1987-02-24

    申请号：JP18221785

    申请日：1985-08-20

    Applicant: FUJITSU LTD

    Inventor： NAKAHARA YASUHIRO ,  MITA TERUYOSHI ,  KITANO YOSHIHIRO ,  NEGISHI HITOSHI ,  NAKAMURA OSAMU

    Abstract: PURPOSE:To release automatically loop-back at trouble by providing a communication equipment with a means which monitors the state of an annular data transmission line and gathering and accumulating information at intervals of a certain time and comparing information with a set value to judge restoration from trouble. CONSTITUTION:A common control part 22 of each of plural communication equipments connected by duplexed annular data transmission lines detects the state of each transmission line according as frame synchronization can be detected by a synchronization detecting part 19 or not. If a trouble is detected, by-pass switches 20A and 20B are controlled to set the loop back. A timer 24 is used to check states of transmission lines at intervals of a certain time, and results are counted. If the counted value does not exceed a preliminarily determined threshold after a certain time, restoration from the trouble is judged to instruct the release of loop-back.

    Controlling system of node assembling
    87.
    发明专利
    Controlling system of node assembling 失效
    节点组装控制系统

    公开(公告)号：JPS6179339A

    公开(公告)日：1986-04-22

    申请号：JP20221484

    申请日：1984-09-27

    Applicant: Fujitsu Ltd

    Inventor： NEGISHI HITOSHI ,  MITA TERUYOSHI ,  KITANO YOSHIHIRO ,  NAKAHARA YASUHIRO ,  NAKAMURA OSAMU

    Abstract: PURPOSE: To lighten the load of a communication system of an annular transmission line for assembling in a node drifted away from the system, by setting prescribed assembling-in requesting information in a communication frame and repeating the information and, when the information is detected by a monitor device, causing the device to start the node assembling-in process.
    CONSTITUTION: A communication frame has an assembling-in requesting section 32 between a header section 30 and data section 31 and the section 32 is composed of a used bit section 33 and address section 34. Upon detecting the requesting section 32 from the count value of a slot counting section 9, a comparator section 8 informs a control section 10 of the detection and the control section 10 inspects the used bit section 33 and, when the used bit is '1', causes the communication frame to be repeated as it is. Upon receiving the communication frame, a monitor device starts assembling-in process for assembling the node of the address which is the content of the address section 34 in the communication system. At the node making the assembling-in request, the time slot number of its own node is set in the register 12 of the comparator section 8 from the control section 10 when the reception of a communication cable, etc., is completed by the assembling-in process, and a communicatable condition is set. Therefore, the load of the communication system of an annular transmission line for assembling in a node which is drifted away from the system is lightened.
    COPYRIGHT: (C)1986,JPO&Japio

    Abstract translation: 目的：通过在通信帧中设定规定的组装请求信息并重复该信息，减轻环路传输线路通信系统的负载，以组装在远离系统的节点中，并且当信息被 监视器设备，使设备启动节点组装过程。 构成：通信帧在标题部分30和数据部分31之间具有组装请求部分32，部分32由使用的位部分33和地址部分34组成。一旦从请求部分32的计数值 时隙计数部分9，比较部分8通知控制部分10的检测，并且控制部分10检查所使用的位部分33，并且当所使用的位为“1”时，使得通信帧被重复，因为它是 。 在接收到通信帧时，监视器装置开始组装在通信系统中作为地址部分34的内容的地址的节点的组装过程。 在进行组装请求的节点，当通过组装完成通信电缆等的接收时，其控制部分10在比较器部分8的寄存器12中设置其自身节点的时隙编号 在进程中，设置可通信条件。 因此，用于组装在远离系统的节点中的环形传输线的通信系统的负载被减轻。

    Test system of frequency synchronization
    88.
    发明专利
    Test system of frequency synchronization 失效
    频率同步测试系统

    公开(公告)号：JPS6145650A

    公开(公告)日：1986-03-05

    申请号：JP16682284

    申请日：1984-08-09

    Applicant: Fujitsu Ltd

    Inventor： TAKEYAMA AKIRA ,  TAZAKI TAKASHI ,  MATSUDA MASAHIRO ,  MITA TERUYOSHI

    IPC: H04L7/00

    Abstract: PURPOSE: To attain the test of a line by detecting whether or not a data number in a synchronizing buffer exists between an upper limit and a lower limit value.
    CONSTITUTION: In testing a line between nodes ND-A and ND-B, an output and an input of a terminal DTEb side of the node ND-B are connected, the test data is transmitted from a terminal DTEa connected to the node ND-A and the terminal device DTEa receives the test data. That is, a loopback line is formed for the test. The test is conducted by the test system like this and the data number in the data speed adjustment buffer built in a multiplex MXa of the node ND-A side is checked to check the operating state of a loopback line.
    COPYRIGHT: (C)1986,JPO&Japio

    Abstract translation: 目的：通过检测在上限和下限值之间是否存在同步缓冲器中的数据号来获得线路的测试。 结论：在测试节点ND-A和ND-B之间的一条线路上，连接节点ND-B的终端DTEb侧的输出和输入，测试数据从连接到节点ND-B的终端DTEa发送， A和终端设备DTEa接收测试数据。 也就是说，形成了用于测试的回送线。 由这样的测试系统进行测试，并且检查内置在节点ND-A侧的多路复用MXa中的数据速度调整缓冲器中的数据编号，以检查环回线路的操作状态。

    COMMUNICATION CONTROL SYSTEM
    89.
    发明专利
    COMMUNICATION CONTROL SYSTEM 失效

    公开(公告)号：JPS60254852A

    公开(公告)日：1985-12-16

    申请号：JP11125284

    申请日：1984-05-31

    Applicant: FUJITSU LTD

    Inventor： NEGISHI HITOSHI ,  MITA TERUYOSHI ,  KITANO YOSHIHIRO ,  NAKAHARA YASUHIRO ,  NAKAMURA OSAMU

    IPC: H04L12/00 ,  H04L11/00

    Abstract: PURPOSE:To prevent stations from receiving their own sent data by providing a communication mode part in each time slot, and turning off the communication mode part at each station when terminal information of an originating and a terminating station turns on and starting communication operation. CONSTITUTION:A data highway system is provided with a communication mode part CMM in each time slot TSl. When a communication circuit is set between the originating station and terminating station, a highway monitoring device SV turns on a communication mode assigned by a communication mode control part to send out data and then turns on terminal information parts SDR and RDR corresponding to their own stations when the date set ready is turned on. When the terminal information parts SDR and RDR of both stations are turned on, common control parts 5 of those stations turn off a communication mode part CMM to start a communication.

    SIMULTANEOUS DIAGNOSIS SYSTEM OF CIRCUIT CORRESPONDENCE PART
    90.
    发明专利
    SIMULTANEOUS DIAGNOSIS SYSTEM OF CIRCUIT CORRESPONDENCE PART 失效

    公开(公告)号：JPS60244135A

    公开(公告)日：1985-12-04

    申请号：JP9993384

    申请日：1984-05-18

    Applicant: FUJITSU LTD

    Inventor： MITA TERUYOSHI ,  KITANO YOSHIHIRO ,  NAKAHARA YASUHIRO ,  NEGISHI HITOSHI ,  NAKAMURA OSAMU

    IPC: H04L12/26

    Abstract: PURPOSE:To detect and diagnose the generation of fault of plural circuit correspondence parts by inserting with branch the data on the branched j-th time slot to the (j+1)-th time slot in case said data is returned within a circuit correspondence part. CONSTITUTION:In a simultaneous diagnosis system to the same and different communication correspondence parts, the data on the j-th time slot TSj is returned at a circuit correspodence part LS1 and inserted to the (j+1)-th time slot TS(j+1) and sent to a diagnosis result deciding part M of a host computer via a branch circuit 152, a data reverse conversion circuit 153 and a data transmission line 12. The data on the slot TS(j+1) is branched to the next circuit correspondence part LS2 and returned to be inserted to the (j+2)-th time slot TS(j+2) and then sent to the part M in the same route as the data on the TSj. Hereafter the similar procedures are carried out, and each circuit correspondence part can be diagnosed individually. Thus it is possible to detect and diagnose the faults of plural circuit correspondence parts.

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