公开(公告)号：EP2661692A4

公开(公告)日：2014-07-02

申请号：EP12732390

申请日：2012-01-05

Applicant: MICRON TECHNOLOGY INC

Inventor： MANNING TROY A ,  CULLEY MARTIN L ,  LARSEN TROY D

IPC: G06F12/06 ,  G06F12/02 ,  G06F12/10

CPC classification number: G06F12/1045 ,  G06F12/0246 ,  G06F12/0292 ,  G06F12/1009 ,  G06F12/1027 ,  G06F2212/1004 ,  G06F2212/7201 ,  Y02B60/1225 ,  Y02D10/13

Abstract: The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array includes a first table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a data segment stored in the array and a logical address. The controller includes a second table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the first table and a logical address. The controller also includes a third table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the second table and a logical address.

公开(公告)号：EP2332143A4

公开(公告)日：2012-03-28

申请号：EP09819740

申请日：2009-10-06

Applicant: MICRON TECHNOLOGY INC

Inventor： KEETH BRENT ,  MARTIN CHRIS G ,  MANNING TROY A ,  JEDDELOH JOE M ,  COWLES TIMOTHY B ,  REHMEYER JIM ,  LABERGE PAUL A

IPC: G11C8/04 ,  G11C8/06

CPC classification number: G06F12/08 ,  G06F12/10 ,  G11C5/025 ,  G11C29/04 ,  G11C29/18 ,  G11C29/76 ,  G11C29/78 ,  G11C29/808 ,  G11C29/812 ,  G11C29/883 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2224/05599

Abstract: Various embodiments include apparatus, systems, and methods having multiple dice arranged in a stack in which a defective cell may be replaced by a spare cell on the same die or a different die.