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公开(公告)号:JPH03274746A
公开(公告)日:1991-12-05
申请号:JP7493890
申请日:1990-03-24
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU , MINEGISHI SHINJI , SUMI HIROBUMI
IPC: H01L21/677 , H01L21/68
Abstract: PURPOSE:To execute a large number of treatment without widening an occupying area by installing a structure section in which a plurality of chambers or a plurality of treating sections are arranged in different height. CONSTITUTION:In a multi-chamber device, process chambers 8 are connected to each of the three side faces of a transfer chamber 5 having a approximately square-shaped plane shape through six gate valves 4 in total at every two stage vertically, and a load lock chamber 1 is mounted on residual one side face. Cryopumps 10 conducting discharge to upper sections are set up to the process chambers at an upper stage and a cryopump 10 performing discharge to a lower section to the process pump at a lower stage respectively in each process chamber 8, 8,.... A wafer transfer mechanism 9 can lift and lower an arm 6 and a fork 7 as a whole so as to be able to transfer semiconductor wafers 3 among the chambers 8 at the upper stage and the chamber 8 at the lower stage. Accordingly, the kinds of treatment or throughput capable of being conducted by the multi-chamber device can be increased without approximately widening the occupied area.
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公开(公告)号:JPH03185823A
公开(公告)日:1991-08-13
申请号:JP32521489
申请日:1989-12-15
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU , MINEGISHI SHINJI
IPC: H01L21/3205 , H01L21/28 , H01L21/285
Abstract: PURPOSE:To prevent the generation of pin holes, improve heat resistance, and obstruct the punchthrough of low melting point metal, by filling a contact hole formed in the interlayer insulating film on a semiconductor substrate with polycrystalline silicon, and forming a barrier metal layer thereon by reactive sputtering while applying a bias voltage to the semiconductor substrate. CONSTITUTION:An interlayer insulating film 3A is formed by laminating the following in order on a semiconductor substrate 1 provided with a diffusion layer 2; a silicon oxide film 13, a spin-on-glass film 14, and a phosphorus silicate glass film 15. A contact hole 4 is formed in the layer 3A; a natural oxide film 11 and damaged parts are eliminated by chemical dry etching; and then polycrystalline silicon 5 is buried in the contact hole. The whole part is etched back by reactive ion etching; the polycrystalline silicon is left only in the contact hole 4 and a plug 6 is formed; and a natural oxide film 18 on the upper surface is again eliminated by chemical dry etching. While an RF bias 40 is applied to the semiconductor substrate 1, reactive sputtering is performed, thereby forming a barrier metal layer 9 and depositing a low melting point metal layer 10.
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公开(公告)号:JPH03108359A
公开(公告)日:1991-05-08
申请号:JP24557589
申请日:1989-09-21
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU
IPC: H01L23/522 , H01L21/768
Abstract: PURPOSE:To form wiring structure wherein the interval between wirings is small by forming wirings, which are buried in a contact hole by etching and etching-back, in the openings of two resist patterns crossing each other. CONSTITUTION:An SiO2 film 2 is formed on an Si substrate 1, and then a first resist pattern 4, which has an opening 4a corresponding to a wiring 3, is formed, and with this as a mask, a film 2 is etched to the depth corresponding to the thickness of the wiring. A second resist pattern 5, which has an opening crossing the opening 4a at right angle, is formed, and with the patterns 5 and 4 as masks, a contact hole C is formed. And after removal of the patterns 4 and 5, a metallic film 6 is formed, and resist 7 is applied so that the surface may be flat, and until the surface of the film 2 is exposed, it is etched back in the direction vertical to the surface of the substrate 1. This way, the wirings 3 are formed during self alignment to the hole C.
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公开(公告)号:JPH0362950A
公开(公告)日:1991-03-19
申请号:JP19823889
申请日:1989-07-31
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU , MINEGISHI SHINJI , SUMI HIROBUMI
IPC: H01L21/768
Abstract: PURPOSE:To form an inorganic flattened film without the occurrence of cracks even if impurities are not added by applying organosilanol having the specified atomic ratio of carbon/silicon on a substrate, performing heat treatment in an oxygen atmosphere, and obtaining the inorganic state. CONSTITUTION:Organosilanol whose atomic ratio of carbon(C)/silicon(Si) is 2 or less is applied on a substrate. Namely, an oxide film 11 comprising SiO2 is formed on the silicon substrate 10. A plurality of wirings 12 comprising polycrystalline silicon are formed on the oxide film 11. Then SOG 13 wherein 14weight% organosilanol is dissolved in organic solvent is applied in rotating pattern. After the solvent is removed, annealing is performed, and the SOG 13 is condensed. At this time, the shape of the SOG 13 is approximately flattened. Thereafter, annealing is performed in an oxygen atmosphere so as to obtain an inorganic state. At this time, the film contracting rate of the SOG 13 is about 25%. Cracks which form slight recess parts in the wirings 12 and 12 are not formed at all, and the flatness is remarkably improved.
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公开(公告)号:JPH033242A
公开(公告)日:1991-01-09
申请号:JP13723489
申请日:1989-05-30
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU
IPC: H01L21/3205 , H01L21/768 , H01L23/522
Abstract: PURPOSE:To prevent wire breaking which occurs between multilayer interconnections by forming multilayer interconnections in advance, and then forming a through hole which pierces upper layer wiring and leads to lower layer wiring, and next burying conductive material in this connection hole. CONSTITUTION:In the multilayer interconnection forming method of forming multilayer interconnections 6 and 8 through interlayer insulating films 7 and 11 on a semiconductor substrate 1, after forming multilayer interconnections 6 and 8 in advance, a connection hole 12a, which pierces upper layer wiring 8 and leads to lower layer wiring 6, is formed, and next a tungsten metallic layer 14 is buried in the connection hole 12a. As a result, silicide reaction by heat treatment and volume shrinkage by this reaction, etc., cease to be done between the multilayer interconnections 6 and 8 and the conductive material 14, and wire breaking between the interlayer interconnections 6 and 8 and the conductive material 14 is prevented.
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公开(公告)号:JPH0254524A
公开(公告)日:1990-02-23
申请号:JP20543088
申请日:1988-08-17
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU
IPC: H01L21/3205 , H01L21/28
Abstract: PURPOSE:To reduce oxide films and prevent contact resistance from increasing by forming a reduction film of an element having formation energy of an oxide which is larger than that of silicon, thereby treating its film with heat after filling a contact hole with silicon. CONSTITUTION:A contact hole 4 is formed in an insulating film 3 so that the surface of a semiconductor region 2 which is formed selectively on the surface of a semiconductor substrate 1 is exposed. Then, a titanium film 6 having not only formation energy of an oxide which is larger than that of silicon but also high conductivity is formed. Subsequently, a polycrystal silicon layer 7 is formed by a CVD process at reduced pressure to fill the contact hole and the polycrystal silicon layer 7 is left only in the contact hole 4 by performing etch-back. In addition to activating impurities by heat-treating the impurities after performing ion implantation of phosphorus P, a silicon oxide film 5 is reduced by the titanium film 6; besides, a titanium silicide film 8 is formed at a boundary part between the polycrystal 7 and the semiconductor region 2. After that, for example, a barrier layer 9 and an aluminum layer 10 consisting of titanium and the like are formed and they are patterned.
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公开(公告)号:JPH01140743A
公开(公告)日:1989-06-01
申请号:JP29940287
申请日:1987-11-27
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU
IPC: H01L21/3205 , H01L21/31 , H01L23/52
Abstract: PURPOSE:To restrain a nitride insulating film from being deformed, to prevent voids from being developed and to enhance reliability of a wiring layer by a method wherein a refractory metal eutectic alloy layer is formed on a sidewall part of an A>= wiring layer. CONSTITUTION:In a semiconductor device which contains a nitride insulating film 6 on an Al wiring layer 3 of a substrate 1, a refractory metal eutectic alloy layer 4 is formed on sidewall parts of the Al wiring layer 3. A refractory metal eutectic alloy to be used is a refractory metal silicide such as WSix, MoSix, TaSix, TiSix or the like. That is to say, the nitride insulating film 6 is swollen and deformed when a true stress of contraction is exerted at a temperature of 400 deg.C or higher; accordingly, if the refractory metal eutectic alloy layer 4 is formed on the sidewall parts of the Al wiring layer 3, a tensile stress is exerted on the nitride insulating layer 6; it is possible to prevent the nitride insulating film 8 from being swollen and being deformed. Accordingly, voids are not developed in the Al wiring layer 3; it is possible to restrain reliability of the Al wiring layer 3 from being lowered.
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公开(公告)号:JPS63210271A
公开(公告)日:1988-08-31
申请号:JP4173587
申请日:1987-02-25
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU , HAMASHIMA TOSHIKI
IPC: H01L21/285 , C23C14/34
Abstract: PURPOSE:To increase the yield of sputtering with Ar ions when a film is formed on the surface of a substrate by DC bias sputtering in a gaseous Ar atmosphere, by controlling the pressure of the gaseous Ar. CONSTITUTION:When a thin film of the substance of a target 1 is formed on the surface of a semiconductor substrate 3 by DC bias sputtering in gaseous Ar as atmospheric gas, the gaseous Ar is ionized by glow discharge caused between the target 1 and a shielding plate as a counter electrode 2 and the target 1 is sputtered as fine particles to form the thin film on the surface of the substrate 3. By reducing the pressure of the gaseous Ar as the atmospheric gas, the average free path of Ar ions is made longer than the distance (l) between the target 1 and the substrate 3, the attenuation of the energy of Ar ions due to scattering is prevented and the yield of sputtering of the target with Ar ions is increased.
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公开(公告)号:JPS6319748A
公开(公告)日:1988-01-27
申请号:JP16332486
申请日:1986-07-11
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU
Abstract: PURPOSE:To generate a magnetic field with uniform intensity which is everywhere perpendicular to an electric field, by disposing a pair of electrodes inside a hollow solenoid so that the magnetic field is generated therein perpendicular to the electric field. CONSTITUTION:An electrode plate 2 and either target or semiconductor wafer 3 are disposed parallel to each other inside a hollow solenoid 1 and facing to each other in parallel with the axis of the hollow solenoid 1. A magnetic field having uniform density of magnetic flux is generated inside such a hollow solenoid 1. And respective lines of magnetic force are orientated parallel to the axis of the solenoid 1. Voltage applied between the electrode plate 2 and either target or semiconductor wafer 3 generates an electric field having uniform intensity between them. The lines of electric force generated are orientated from the positive electrode to the negative one, and besides being perpendicular to the lines of magnetic force.
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公开(公告)号:JPS61187333A
公开(公告)日:1986-08-21
申请号:JP2772385
申请日:1985-02-15
Applicant: SONY CORP
Inventor: SUGANO YUKIYASU , KIMURA SATORU
IPC: C23C14/18 , H01L21/28 , H01L21/285
Abstract: PURPOSE:To improve the humidity resistance by a method wherein a deposited film is formed in an atmosphere with steam partial pressure P represented by an expression of 2.2X10 Torr Torr. CONSTITUTION:A substrate with an SiO2 film formed on a specified position thereof is arranged in a high vacuum and then steam is supplied up to a level attaining to specified partial pressure P. Next Al is deposited on the SiO2 film in the steam atmosphere. In such a constitution, the deposited Al reacts to the steam to absorb O2 into the Al deposited film so that Al crystal particles may be pulverized to stabilize the particle size restraining hillocks from being produced thus improving the humidity resistance.
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