公开(公告)号：WO2015192871A1

公开(公告)日：2015-12-23

申请号：PCT/EP2014/062551

申请日：2014-06-16

Applicant: EPCOS AG ,  COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES

Inventor： HENN, Gudrun ,  GIESEN, Marcel ,  DEN DEKKER, Arnoldus ,  PORNIN, Jean-Louis ,  SAINT-PATRICE, Damien ,  REIG, Bruno

IPC: B81C1/00

CPC classification number: B81C1/00293 ,  B81B7/0041 ,  B81B2203/0315 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0176 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: The present invention concerns a microelectronic package (1) comprising a microelectronic structure (2) having at least a first opening (3) and defining a first cavity (4), a capping layer (9) having at least a second opening (10) and defining a second cavity (11) which is connected to the first cavity (4), wherein the capping layer (9) is arranged over the microelectronic structure (2) such that the second opening (10) is arranged over the first opening (3), and a sealing layer (13) covering the second opening (10), thereby sealing the first cavity (4) and the second cavity (11). Moreover, the present invention concerns a method of manufacturing the microelectronic package (1).

Abstract translation: 本发明涉及包括具有至少第一开口（3）并限定第一空腔（4）的微电子结构（2）的微电子封装（1），具有至少第二开口（10）的封盖层（9） 并且限定连接到所述第一腔体（4）的第二空腔（11），其中所述覆盖层（9）布置在所述微电子结构（2）上方，使得所述第二开口（10）布置在所述第一开口 3）和覆盖第二开口（10）的密封层（13），从而密封第一腔（4）和第二腔（11）。 此外，本发明涉及一种制造微电子封装（1）的方法。

公开(公告)号：WO2014179340A2

公开(公告)日：2014-11-06

申请号：PCT/US2014/035920

申请日：2014-04-29

Applicant: THE UNIVERSITY OF NORTH CAROLINA AT CHAPEL HILL

Inventor： CAHOON, James ,  CHRISTESEN, Joseph ,  PINION, Christopher

CPC classification number: H01L29/0673 ,  B81B3/0021 ,  B81B2203/0118 ,  B81B2203/0361 ,  B81C1/00111 ,  B81C1/0015 ,  B81C2201/013 ,  B81C2201/0171 ,  B81C2201/0176 ,  G01Q60/38 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/283 ,  H01L21/30604 ,  H01L29/16 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/09 ,  Y02E10/50

Abstract: Methods of chemically encoding high-resolution shapes in silicon nanowires during metal nanoparticle catalyzed vapor-liquid-solid growth or vapor-solid-solid growth are provided. In situ phosphorus or boron doping of the silicon nanowires can be controlled during the growth of the silicon nanowires such that high-resolution shapes can be etched along a growth axis on the silicon nanowires. Nanowires with an encoded morphology can have high-resolution shapes with a size resolution of about 1,000 nm to about 10 nm and comprise geometrical shapes, conical profiles, nanogaps and gratings.

Abstract translation: 提供了在金属纳米粒子催化的气 - 液 - 固 - 固生长或蒸气固 - 固生长期间化学编码硅纳米线中的高分辨率形状的方法。 硅纳米线的原位磷掺杂或硼掺杂可以在硅纳米线生长期间被控制，使得高分辨率形状可以沿着硅纳米线上的生长轴被蚀刻。 具有编码形态的纳米线可以具有尺寸分辨率为约1,000nm至约10nm的高分辨率形状，并且包括几何形状，圆锥形轮廓，纳米间隙和光栅。

公开(公告)号：WO2004109769A3

公开(公告)日：2005-12-29

申请号：PCT/US2004009492

申请日：2004-03-30

Applicant: BOSCH GMBH ROBERT ,  PARTRIDGE AARON ,  LUTZ MARKUS ,  KRONMUELLER SILVIA

Inventor： PARTRIDGE AARON ,  LUTZ MARKUS ,  KRONMUELLER SILVIA

IPC: H01L20060101 ,  H01L21/44 ,  H01L23/28 ,  H01L23/48 ,  H01L23/52 ,  H01L27/14 ,  H01L29/40 ,  H01L29/82 ,  H01L29/84

CPC classification number: B81C1/00261 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2201/0176 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures (20a-d) encapsulated in a chamber (26) prior to final packaging. The material (28a) that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilities integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Abstract translation: 这里描述和说明了许多发明。 一方面，本发明涉及一种MEMS器件，以及制造或制造MEMS器件的技术，其具有在最终封装之前封装在腔室（26）中的机械结构（20a-d）。 当沉积时，封装机械结构的材料（28a）包括以下属性中的一个或多个：低拉伸应力，良好的阶梯覆盖度，当经受后续加工时保持其完整性，不会显着和/或不利地影响性能 室内的机械结构的特征（如果在沉积期间涂覆材料）和/或与高性能集成电路的设备集成。 在一个实施例中，封装机械结构的材料是例如硅（多晶，无定形或多孔，无论掺杂或未掺杂），碳化硅，硅 - 锗，锗或砷化镓。

公开(公告)号：WO2004109769A2

公开(公告)日：2004-12-16

申请号：PCT/US2004/009492

申请日：2004-03-30

Applicant: ROBERT BOSCH GmbH ,  PARTRIDGE, Aaron ,  LUTZ, Markus ,  KRONMUELLER, Silvia

Inventor： PARTRIDGE, Aaron ,  LUTZ, Markus ,  KRONMUELLER, Silvia

IPC: H01L

CPC classification number: B81C1/00261 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2201/0176 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Abstract translation: 这里描述和说明了许多发明。 在一个方面，本发明涉及MEMS器件，以及制造或制造MEMS器件的技术，其具有在最终封装之前封装在腔室中的机械结构。 当沉积时，封装机械结构的材料包括以下属性中的一个或多个：低拉伸应力，良好的阶梯覆盖，在经受后续加工时保持其完整性，不会显着和/或不利地影响 室中的机械结构（如果在沉积期间涂覆材料）和/或促进与高性能集成电路的集成。 在一个实施例中，封装机械结构的材料是例如硅（多晶，无定形或多孔，无论掺杂或未掺杂），碳化硅，硅 - 锗，锗或砷化镓。

公开(公告)号：KR1020140053246A

公开(公告)日：2014-05-07

申请号：KR1020147005238

申请日：2012-08-03

Applicant: 로베르트 보쉬 게엠베하

Inventor： 파이안도 ,  클라쎈요하네스

IPC: B81B3/00

CPC classification number: B81B3/0086 ,  B81B3/0008 ,  B81C2201/0169 ,  B81C2201/017 ,  B81C2201/0176

Abstract: 일 실시예에서, MEMS 장치를 형성하는 방법은 기판을 제공하는 단계와, 기판층 상부에 희생층을 형성하는 단계와, 희생층 상에 실리콘계 작용부를 형성하는 단계와, 작용부가 적어도 하나의 노출된 외면을 포함하도록 희생층으로부터 실리콘계 작용부를 배출하는 단계와, 실리콘계 작용부의 적어도 하나의 노출된 외면 상에 제1 실리사이드 형성 금속층을 형성하는 단계와, 제1 실리사이드 형성 금속층으로 제1 실리사이드층을 형성하는 단계를 포함한다.

公开(公告)号：KR1020060015633A

公开(公告)日：2006-02-17

申请号：KR1020057023053

申请日：2004-03-30

Applicant: 로베르트 보쉬 게엠베하

Inventor： 패트리지아론 ,  룻츠마르쿠스 ,  크론뮐러실비아

IPC: B81B7/02 ,  H01L21/44

CPC classification number: B81C1/00261 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2201/0176 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Abstract translation: 这里描述和说明了许多发明。 在一个方面，本发明涉及MEMS器件，以及制造或制造MEMS器件的技术，其具有在最终封装之前封装在腔室中的机械结构。 当沉积时，封装机械结构的材料包括以下属性中的一个或多个：低拉伸应力，良好的阶梯覆盖，在进行后续加工时保持其完整性，不会显着和/或不利地影响 室中的机械结构（如果在沉积期间涂覆材料）和/或促进与高性能集成电路的集成。 在一个实施例中，封装机械结构的材料是例如硅（多晶，无定形或多孔，无论掺杂或未掺杂），碳化硅，硅 - 锗，锗或砷化镓。

公开(公告)号：KR101145095B1

公开(公告)日：2012-05-11

申请号：KR1020117008540

申请日：2004-03-30

Applicant: 로베르트 보쉬 게엠베하

Inventor： 패트리지아론 ,  룻츠마르쿠스 ,  크론뮐러실비아

IPC: B81B7/02 ,  B81C1/00 ,  H01L21/44

CPC classification number: B81C1/00261 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2201/0176 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

Abstract: 본 명세서에서 다수의 발명들이 설명되고 도시된다. 일 태양에서, 본 발명은 MEMS 장치, 및 최종 패키징 전에 챔버에 캡슐화된 기계 구조물을 갖는 MEMS 장치의 제조 및 생산 기술에 관한 것이다. 증착될 때 기계 구조물을 캡슐화하는 재료는 하기의 속성들 중 하나 이상을 포함한다: 낮은 인장 응력, 우수한 단계 적용 범위, 후속 처리를 받을 때의 완전성의 유지, 챔버 내에서의 기계 구조물의 성능 특성에 상당한 및/또는 악영향을 미치지 않음(증착 동안 재료로 코팅되는 경우), 및/또는 고성능 집적 회로의 집적 용이성. 일 실시예에서, 기계 구조물을 캡슐화하는 재료는, 예를 들어 (도핑된 또는 도핑되지 않은 다결정, 비결정 또는 다공성) 실리콘, 실리콘 카바이드, 실리콘-게르마늄, 게르마늄 또는 갈륨 비소이다.

公开(公告)号：KR1020040033299A

公开(公告)日：2004-04-21

申请号：KR1020040021000

申请日：2004-03-27

Applicant: 삼성전자주식회사

Inventor： 고영철 ,  이진호 ,  이창수

IPC: G02B26/10

CPC classification number: G02B26/105 ,  B81B2203/0154 ,  B81C2201/013 ,  B81C2201/0176 ,  H02N1/008

Abstract: PURPOSE: An optical scanner using an anodic bonding method and a fabricating method thereof are provided to improve the stability by forming an anodic laminate structure of a dielectric and a glass plate or the anodic laminate structure of the dielectric and a metal layer. CONSTITUTION: An optical scanner using an anodic bonding method includes a rectangular frame(80), a torsion bar(61'), a rectangular scanning mirror(66"), and a driving comb electrode(61"). One or more dielectrics and metal layers are formed between a substrate and a glass plate. The rectangular frame(80) includes an anodic laminate structure having the dielectrics and the metal layers. The torsion bar(61') is extended from the rectangular frame. The rectangular scanning mirror(66") is connected to the torsion bar. The driving comb electrode(61") is formed on a bottom face of the rectangular scanning mirror.

Abstract translation: 目的：提供一种使用阳极接合方法的光学扫描仪及其制造方法，通过形成电介质和玻璃板的阳极叠层结构或电介质和金属层的阳极叠层结构来提高稳定性。 构成：使用阳极接合方法的光学扫描仪包括矩形框架（80），扭杆（61'），矩形扫描镜（66“）和驱动梳状电极（61”）。 在基板和玻璃板之间形成一个或多个电介质和金属层。 矩形框架（80）包括具有电介质和金属层的阳极叠层结构。 扭杆（61'）从矩形框架延伸。 矩形扫描镜（66“）连接到扭杆上，驱动梳状电极（61”）形成在矩形扫描镜的底面上。

公开(公告)号：JP2017519646A

公开(公告)日：2017-07-20

申请号：JP2016573545

申请日：2014-06-16

Applicant: エプコス アクチエンゲゼルシャフトEpcos Ag ,  エプコス アクチエンゲゼルシャフトEpcos Ag

Inventor： グドルン ヘン， ,  グドルン ヘン， ,  マルセル ギーセン， ,  マルセル ギーセン， ,  デッカー， アルノルダス デン ,  デッカー， アルノルダス デン ,  ジャン−ルイ ポーニン， ,  ジャン−ルイ ポーニン， ,  ダミエン サン−パトリス， ,  ダミエン サン−パトリス， ,  ブルーノ レイ， ,  ブルーノ レイ，

IPC: B81B7/02 ,  B81C1/00 ,  H01L23/02

CPC classification number: B81C1/00293 ,  B81B7/0041 ,  B81B2203/0315 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0176 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: 本発明は、マイクロエレクトロニクスパッケージ(1)に関し、当該マイクロエレクトロニクスパッケージは、少なくとも1つの第1の開口部(3)を有し、かつ1つの第1のキャビティ(4)を画定する1つのマイクロエレクトロニクスパターン(2)と、少なくとも1つの第2の開口部(10)を有し、かつ当該第1のキャビティ(4)に接続される第2のキャビティ(11)を画定する1つのキャッピング層(9)とを備え、ここで当該キャッピング層(9)は、当該第2の開口部(10)が当該第1の開口部(3)の上方に配設されるように、当該マイクロエレクトロニクスパターン(2)の上方に配設されており、そして当該第2の開口部(10)を覆う1つのシーリング層(13)を備え、これにより当該第1のキャビティ(11)および当該第2のキャビティ(4)がシーリングされる。さらに、本発明はこのマイクロエレクトロニクスパッケージ(1)を製造する方法に関する。【選択図】図1

公开(公告)号：JP5281682B2

公开(公告)日：2013-09-04

申请号：JP2011183879

申请日：2011-08-25

Applicant: ロベルト・ボッシュ・ゲゼルシャフト・ミト・ベシュレンクテル・ハフツングRobert Bosch Gmbh

Inventor： パートリッジ，アーロン ,  ルッツ，マルクス ,  クローンミュラー，ズィルヴィア

IPC: B81C1/00 ,  H01L20060101 ,  H01L21/44 ,  H01L23/06 ,  H01L23/28 ,  H01L23/48 ,  H01L23/52 ,  H01L27/14 ,  H01L29/40 ,  H01L29/82 ,  H01L29/84

CPC classification number: B81C1/00261 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2201/0176 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.