公开(公告)号：WO1993024939A1

公开(公告)日：1993-12-09

申请号：PCT/US1993005061

申请日：1993-05-27

Applicant: ADVANCED CIRCUIT TECHNOLOGY, INC.

Inventor： ADVANCED CIRCUIT TECHNOLOGY, INC. ,  MURPHY, Davis, W. ,  BONNETTE, Dennis, A. ,  STEARNS, Thomas, H.

IPC: H01B07/08

CPC classification number: H05K3/06 ,  H05K1/0393 ,  H05K3/281 ,  H05K3/4092 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2203/0353 ,  H05K2203/0369 ,  H05K2203/0384 ,  Y10T29/49156 ,  Y10T29/49218 ,  Y10T29/49222 ,  Y10T428/1291

Abstract: A laminate (50) comprising metal layers (56 and 58) separated by an etchant barrier (51) to control depth of etching of the laminate, the barrier being etchable by an etchant which is not an etchant for the layers. A cable (20) incorporating such a laminate and having relatively flexible conductors (22) integral with relatively rigid terminals. A method of making such a cable, using the laminate, by selectively etching the layers down to the barrier to form the conductors and terminals (26 and 28), stripping the barrier and laminating the conductors with an insulating material (42 and 44) preferably extending over at least a portion of the terminals to reinforce the conductor terminal transition and a cable when made of such a method.

公开(公告)号：DE2727641C2

公开(公告)日：1984-07-26

申请号：DE2727641

申请日：1977-06-20

Applicant: ADVANCED CIRCUIT TECHNOLOGY, INC., NASHUA, N.H., US

Inventor： OSTMAN, BARRY I., MERRIMACK, N.H., US ,  ROBERTS, JOSEPH A., HUDSON, N.H., US

IPC: H01R35/02 ,  H01B7/08 ,  H01R43/00 ,  H05K1/03 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H02B1/20 ,  H01R9/09 ,  H01R35/00

公开(公告)号：DE7719278U1

公开(公告)日：1982-10-14

申请号：DE7719278

申请日：1977-06-20

Applicant: ADVANCED CIRCUIT TECHNOLOGY, INC., NASHUA, N.H., US

IPC: H01R35/02 ,  H01B7/08 ,  H01R43/00 ,  H05K1/03 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H01R35/00

公开(公告)号：EP0081986A3

公开(公告)日：1985-04-24

申请号：EP82306593

申请日：1982-12-10

Applicant: Advanced Circuit Technology Inc.

Inventor： Roberts, Joseph A.

IPC: H01R29/00 ,  H05K01/00

CPC classification number: H05K3/222 ,  H05K1/0287 ,  H05K1/029 ,  H05K3/202 ,  H05K2201/10212 ,  H05K2201/10363 ,  H05K2203/175

Abstract: A programmable header constructed from an integral lamina circuit arrangement comprising a plurality of electrically conductive pins in fixed spaced relationship, at least one electrically conductive highway, an electrically conductive lowway, a plurality of electrically conductive cross-links each connecting a separate one of said pins to said lowway and a plurality of electrically conductive side-links each connecting a separate one of said pins to a said highway, wherein said highway or highways lie in a plane or planes spaced from and parallel to a plane in which lies said lowway and are superimposed on but spaced from said cross-links, and wherein said pins project normal to said planes in spaced parallel relationship, said lowway and portions of said links being free from said superimposition thereby to facilitate selective removal of desired portions of said links and lowway to break electrical continuity thereof so as to program interconnection between said pins in a desired manner.