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    Physical simulations on graphics processor
    1.
    发明专利
    Physical simulations on graphics processor 审中-公开
    图形处理器的物理模拟

    公开(公告)号：JP2013020631A

    公开(公告)日：2013-01-31

    申请号：JP2012188538

    申请日：2012-08-29

    Applicant: Ati Technologies Inc ,  エーティーアイ テクノロジーズ ユーエルシー

    Inventor： BLEIWEISS AVI I ,  BARON GERARD S

    IPC: G06T15/00 ,  A63F13/00 ,  G06T1/20 ,  G06T13/60 ,  G06T19/00

    CPC classification number: G06F17/5009 ,  A63F13/00 ,  A63F2300/203 ,  A63F2300/64 ,  A63F2300/643

    Abstract: PROBLEM TO BE SOLVED: To provide a method, computer program product, and system for performing physical simulations on at least one graphics processor unit (GPU).SOLUTION: The method includes the following steps. First, data representing physical attributes associated with at least one mesh are stored into a plurality of memory arrays to set up a linear system of equations that governs motion of the at least one mesh depicted in a scene. Then, computations are performed on the data in the plurality of memory arrays using at least one pixel processor to solve the linear system of equations for an instant of time, in which modified data representing the solution to the linear system of equations for the instant of time are stored in the plurality of data memories.

    Abstract translation: 要解决的问题：提供一种用于在至少一个图形处理器单元（GPU）上执行物理模拟的方法，计算机程序产品和系统。 解决方案：该方法包括以下步骤。 首先，表示与至少一个网格相关联的物理属性的数据被存储到多个存储器阵列中，以建立一个管理场景中描绘的至少一个网格的运动的方程组的线性系统。 然后，使用至少一个像素处理器对多个存储器阵列中的数据执行计算，以解决瞬时时间的线性方程组，其中表示对于线性方程组方程 时间被存储在多个数据存储器中。 版权所有（C）2013，JPO＆INPIT

    SEMICONDUCTOR MEMORY DEVICE WITH HIGH-SPEED OPERATION AND METHOD OF USING AND DESIGNING THE SAME
    3.
    发明专利
    SEMICONDUCTOR MEMORY DEVICE WITH HIGH-SPEED OPERATION AND METHOD OF USING AND DESIGNING THE SAME 审中-公开

    公开(公告)号：JP2003223785A

    公开(公告)日：2003-08-08

    申请号：JP2002375804

    申请日：2002-12-26

    Applicant: ELPIDA MEMORY INC ,  ATI TECHNOLOGIES INC

    Inventor： NAGASHIMA YASUSHI ,  MACRI JOSEPH DOMINIC

    IPC: G11C11/401 ,  G11C7/10 ,  G11C7/22 ,  G11C11/407 ,  G11C11/4076 ,  G11C11/4097

    Abstract: PROBLEM TO BE SOLVED: To provide a DRAM device which can operate at higher speed and also realize miniaturization. SOLUTION: Two types of command interval specifications are defined as first and second command interval specifications. The first command interval specification is defined as the relationship between a preceding command and a following command that are issued for the same bank, while the second command interval specification is defined as the relationship between a preceding command and a following command that are issued for different banks, respectively. As for the second command interval specification, since target banks are different between a preceding command and a following command, the following command is executed during the column circuits precharge after the preceding command. Therefore, in the case of the second command interval specification, a command interval is substantially shortened. In addition, pairs of banks are defined as bank pairs, and are applied the first and the second command interval specifications, so that the DRAM device is small-sized. COPYRIGHT: (C)2003,JPO

    Physical simulation on graphics processor
    4.
    发明专利
    Physical simulation on graphics processor 有权
    图形处理器的物理模拟

    公开(公告)号：JP2012099153A

    公开(公告)日：2012-05-24

    申请号：JP2012028709

    申请日：2012-02-13

    Applicant: Ati Technologies Inc ,  エーティーアイ テクノロジーズ ユーエルシー

    Inventor： BLEIWEISS AVI I ,  BARON GERARD S

    IPC: G06T17/20 ,  G06T11/80 ,  G06T13/60 ,  G06T15/00 ,  G09G5/00

    CPC classification number: G06F17/5009 ,  A63F13/00 ,  A63F2300/203 ,  A63F2300/64 ,  A63F2300/643

    Abstract: PROBLEM TO BE SOLVED: To provide a graphics processor.SOLUTION: This invention is directed to a method, a computer program product and a system for performing physical simulation on at least one graphics processor unit (GPU). The method comprises the following steps; data showing a physical attribute related to at least one mesh, set a linear equation system controlling movement of at least one mesh described in a scene by being stored in multiple memory arrays; the linear equation system for time is solved by calculating the data in the multiple memory arrays using at least one pixel processor; and then the changed data showing a solution for the linear equation for time are stored in multiple data memories.

    Abstract translation: 要解决的问题：提供图形处理器。 解决方案：本发明涉及一种用于在至少一个图形处理器单元（GPU）上执行物理模拟的方法，计算机程序产品和系统。 该方法包括以下步骤： 显示与至少一个网格相关的物理属性的数据，通过存储在多个存储器阵列中来设置控制在场景中描述的至少一个网格的移动的线性方程式系统; 通过使用至少一个像素处理器计算多个存储器阵列中的数据来解决时间线性方程系统; 然后将显示用于时间的线性方程式的解的变化数据存储在多个数据存储器中。 版权所有（C）2012，JPO＆INPIT

    Method and device for inverting data in memory device
    5.
    发明专利
    Method and device for inverting data in memory device 有权
    用于在存储器件中反转数据的方法和装置

    公开(公告)号：JP2010118087A

    公开(公告)日：2010-05-27

    申请号：JP2010048024

    申请日：2010-03-04

    Applicant: Ati Technologies Inc ,  Elpida Memory Inc ,  エイティアイ テクノロジーズ インコーポレイテッド ,  エルピーダメモリ株式会社

    Inventor： JOSEPH MACRI ,  DRAPKIN OLGE ,  TEMKINE GRIGORI ,  NAGASHIMA OSAMU

    IPC: G06F12/00

    Abstract: PROBLEM TO BE SOLVED: To prevent an efficiency of data transfer from deteriorating caused by large number of transitions in a signal level. SOLUTION: A current word is compared with a preceding word of N bits, to identify the number of the bit transitions from a low level value to a high level value, or reversely from the high level value to the low level value. The current bits are inverted when the number of the transitions is more than N/2. A data mask pin not used usually during writing operation for sending the inverted bits is utilized not to make an extra bit go with a data bite for displaying the presence of the inversion. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：为了防止由信号电平中的大量转换引起的数据传输效率降低。 解决方案：将当前字与N位的前一个字进行比较，以识别从低电平值到高电平值的位转换的数量，或者从高电平值反向到低电平值。 当转换次数大于N / 2时，当前位被反转。 通常在用于发送反相位的写入操作期间不使用的数据掩码引脚不被用于显示反转的存在的数据咬入额外的位。 版权所有（C）2010，JPO＆INPIT

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