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    METHOD AND SYSTEM FOR IMPROVING A CONTROL OF A LIMIT ON WRITING CYCLES OF AN IC CARD
    3.
    发明申请
    METHOD AND SYSTEM FOR IMPROVING A CONTROL OF A LIMIT ON WRITING CYCLES OF AN IC CARD 审中-公开
    用于改善IC卡周期限制控制的方法和系统

    公开(公告)号：WO2012089333A1

    公开(公告)日：2012-07-05

    申请号：PCT/EP2011/006554

    申请日：2011-12-23

    Applicant: STMICROELECTRONICS NV ,  VENEROSO, Amedeo ,  VARONE, Francesco ,  DI STASIO, Vitantonio ,  VASTANO, Pasquale

    Inventor： VENEROSO, Amedeo ,  VARONE, Francesco ,  DI STASIO, Vitantonio ,  VASTANO, Pasquale

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F12/0238 ,  G06F2212/1036 ,  G06F2212/7211

    Abstract: The present invention relates to a method and system for controlling a number of writing cycles supported by a cell or portion (11) of a non volatile memory (4) of an IC Card (10), including the steps of -counting write accesses to the memory portion (11) and storing a first counter (21) of the write accesses in another portion (21) of said non volatile memory (4). The method comprises coupling the first counter (21) to a second counter or value (31) associated to a RAM (4) (Random Access Memory) of the IC Card (10), wherein the second counter or value (31) is updated each time the write accesses occur on said cell or portion (11) to be controlled and the first counter (21) is written in the another portion of non volatile memory only when the second counter or value (21) corresponds to a predetermined value.

    Abstract translation: 本发明涉及一种用于控制由IC卡（10）的非易失性存储器（4）的单元或部分（11）支持的写入周期数量的方法和系统，包括以下步骤： - 对 存储器部分（11）并且将所述写入访问的第一计数器（21）存储在所述非易失性存储器（4）的另一部分（21）中。 该方法包括将第一计数器（21）耦合到与IC卡（10）的RAM（4）（随机存取存储器）相关联的第二计数器或值（31），其中第二计数器或值（31）被更新 每当写入访问发生在要被控制的所述单元或部分（11）上时，只有当第二计数器或值（21）对应于预定值时，才将第一计数器（21）写入非易失性存储器的另一部分。

    METHOD AND SYSTEM FOR CALCULATING A CLOCK FREQUENCY OF A CLOCK SIGNAL FOR AN IC CARD
    4.
    发明申请
    METHOD AND SYSTEM FOR CALCULATING A CLOCK FREQUENCY OF A CLOCK SIGNAL FOR AN IC CARD 审中-公开
    用于计算IC卡的时钟信号的时钟频率的方法和系统

    公开(公告)号：WO2012089332A1

    公开(公告)日：2012-07-05

    申请号：PCT/EP2011/006553

    申请日：2011-12-23

    Applicant: STMICROELECTRONICS NV ,  DI STASIO, Vitantonio ,  VARONE, Francesco ,  VENEROSO, Amedeo

    Inventor： DI STASIO, Vitantonio ,  VARONE, Francesco ,  VENEROSO, Amedeo

    IPC: G06K19/07 ,  G07F7/10

    CPC classification number: G06F1/06 ,  G06F1/08 ,  G06K19/07

    Abstract: The present invention relates to a method for calculating a clock frequency (f c1k ) of a clock signal received by an IC Card from a terminal (100) or an internal clock frequency (f c1k ) of a clock signal of the IC Card (140). The method comprises the step of: -receiving a first time-stamp (t s1 ) from the terminal (100); setting a first value (V 1 ) of the timer (220), and starting a timer (220) of the IC Card, when the first time-stamp (t s1 ) is received; receiving a second time-stamp (t S2 ); reading a second value (V 2 ) of the timer (220), when the second time-stamp (t S2 ) is received; and calculating the frequency (f c1k ) comparing a difference between the second (V 2 ) and the first (V 1 ) timer values and a difference between the second (t S2 ) and the first (t s1 ) time stamps.

    Abstract translation: 本发明涉及用于计算由IC卡从IC卡（140）的时钟信号的终端（100）或内部时钟频率（fc1k）接收的时钟信号的时钟频率（fc1k）的方法。 该方法包括以下步骤： - 从终端（100）接收第一时间戳（ts1）; 当接收到第一时间戳（ts1）时，设置定时器（220）的第一值（V1）和启动IC卡的定时器（220） 接收第二个时间戳（tS2）; 当接收到第二时间戳（tS2）时，读取定时器（220）的第二值（V2） 以及计算将所述第二（V2）和所述第一（V1）定时器值之间的差与所述第二（tS2）和所述第一（ts1）时间戳之间的差进行比较的频率（fc1k）。

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