公开(公告)号：WO2010111601A3

公开(公告)日：2011-01-20

申请号：PCT/US2010028844

申请日：2010-03-26

Applicant: SEMPRIUS INC ,  BOWER CHRISTOPHER ,  MENARD ETIENNE ,  MEITL MATTHEW ,  CARR JOSEPH

Inventor： BOWER CHRISTOPHER ,  MENARD ETIENNE ,  MEITL MATTHEW ,  CARR JOSEPH

IPC: H01L21/77 ,  H01L21/84

CPC classification number: H01L27/1266 ,  H01L21/3065 ,  H01L21/32055 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78666

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. A step is performed to selectively etch through the semiconductor active layer and the sacrificial layer in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. A step can be performed to selectively etch through the capping layer and the first portion of the semiconductor active layer to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

Abstract translation: 形成集成电路器件的方法包括在处理衬底上形成牺牲层并在牺牲层上形成半导体活性层。 执行步骤以依次选择性地蚀刻半导体有源层和牺牲层以限定绝缘体上半导体（SOI）衬底，其包括半导体有源层的第一部分。 可以在SOI衬底上形成多层电互连网络。 该多层电互连网络可以由与半导体有源层的第一部分的上表面接触的无机覆盖层封装。 可以执行步骤以选择性地蚀刻通过覆盖层和半导体有源层的第一部分，从而暴露牺牲层。 可以从半导体有源层的第一部分和处理衬底之间选择性地去除牺牲层，从而限定由封盖层封装的悬浮集成电路芯片。

公开(公告)号：WO2010111601A2

公开(公告)日：2010-09-30

申请号：PCT/US2010/028844

申请日：2010-03-26

Applicant: SEMPRIUS, INC. ,  BOWER, Christopher ,  MENARD, Etienne ,  MEITL, Matthew ,  CARR, Joseph

Inventor： BOWER, Christopher ,  MENARD, Etienne ,  MEITL, Matthew ,  CARR, Joseph

IPC: H01L21/77 ,  H01L21/84

CPC classification number: H01L27/1266 ,  H01L21/3065 ,  H01L21/32055 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78666

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. A step is performed to selectively etch through the semiconductor active layer and the sacrificial layer in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. A step can be performed to selectively etch through the capping layer and the first portion of the semiconductor active layer to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

Abstract translation: 形成集成电路器件的方法包括在处理衬底上形成牺牲层并在牺牲层上形成半导体活性层。 执行步骤以依次选择性地蚀刻半导体有源层和牺牲层以限定绝缘体上半导体（SOI）衬底，其包括半导体有源层的第一部分。 可以在SOI衬底上形成多层电互连网络。 该多层电互连网络可以由与半导体有源层的第一部分的上表面接触的无机覆盖层封装。 可以执行步骤以选择性地蚀刻通过覆盖层和半导体有源层的第一部分，从而暴露牺牲层。 可以从半导体有源层的第一部分和处理衬底之间选择性地去除牺牲层，从而限定由封盖层封装的悬浮集成电路芯片。

公开(公告)号：WO2005122285A3

公开(公告)日：2007-08-30

申请号：PCT/US2005019354

申请日：2005-06-02

Applicant: UNIV ILLINOIS ,  NUZZO RALPH G ,  ROGERS JOHN A ,  MENARD ETIENNE ,  LEE KEON JAE ,  KHANG DAHL-YOUNG ,  SUN YUGANG ,  MEITL MATTHEW ,  ZHU ZHENGTAO

Inventor： NUZZO RALPH G ,  ROGERS JOHN A ,  MENARD ETIENNE ,  LEE KEON JAE ,  KHANG DAHL-YOUNG ,  SUN YUGANG ,  MEITL MATTHEW ,  ZHU ZHENGTAO

IPC: H01L21/00 ,  B81C1/00 ,  H01L21/20 ,  H01L21/30 ,  H01L21/326 ,  H01L21/4763 ,  H01L21/77 ,  H01L23/48 ,  H01L27/01 ,  H01L29/06 ,  H01L29/08 ,  H01L29/786 ,  H01L31/0312 ,  H01L31/18

CPC classification number: H01L23/02 ,  B81C2201/0185 ,  B82Y10/00 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02628 ,  H01L21/308 ,  H01L21/322 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0753 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/04 ,  H01L29/06 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/12 ,  H01L29/76 ,  H01L29/78603 ,  H01L29/78681 ,  H01L29/78696 ,  H01L31/0392 ,  H01L31/03926 ,  H01L31/1804 ,  H01L31/1864 ,  H01L31/1896 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/32 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/03 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03614 ,  H01L2224/0362 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/08225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/80 ,  H01L2224/80006 ,  H01L2224/80121 ,  H01L2224/80862 ,  H01L2224/80895 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83121 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/01032 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15159 ,  H01L2924/15162 ,  H01L2924/15788 ,  H01L2924/1579 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S977/707 ,  Y10S977/724 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The invention provides methods and devices for fabricating printable semiconductor elements (555) and assembling printable semiconductor elements onto substrate surfaces (330). The present invention also provides stretchable semiconductor structures (760).

Abstract translation: 本发明提供了用于制造可印刷半导体元件（555）并将可印刷半导体元件组装到衬底表面（330）上的方法和装置。 本发明还提供可拉伸半导体结构（760）。

公开(公告)号：WO2010091391A2

公开(公告)日：2010-08-12

申请号：PCT/US2010/023577

申请日：2010-02-09

Applicant: SEMPRIUS, INC. ,  MENARD, Etienne, Menard ,  BOWER, Christopher ,  BURROUGHS, Scott ,  CARR, Joe ,  CONNER, Bob ,  DETS, Sergiy ,  FURMAN, Bruce ,  MEITL, Matthew ,  SULLIVAN, Michael

Inventor： MENARD, Etienne, Menard ,  BOWER, Christopher ,  BURROUGHS, Scott ,  CARR, Joe ,  CONNER, Bob ,  DETS, Sergiy ,  FURMAN, Bruce ,  MEITL, Matthew ,  SULLIVAN, Michael

CPC classification number: G02B19/0076 ,  G02B3/0056 ,  G02B19/0014 ,  G02B19/0042 ,  H01L31/0232 ,  H01L31/02325 ,  H01L31/0543 ,  H01L31/0547 ,  Y02E10/52

Abstract: CPV modules include a back plate having an array of 1mm2 or smaller solar cells thereon. A backplane interconnect network is also provided on the back plate. This backplane interconnect network operates to electrically connect the array of solar cells together. A front plate, which is spaced-apart from the back plate, is provided. This front plate includes an array of primary lenses thereon that face the array of solar cells. The front plate can be configured to provide a greater than 1000X lens-to-cell light concentration to the array of solar cells. To achieve this 1000X lens-to-cell light concentration, the primary lenses can be configured as plano-convex lenses having a lens sag of less than about 4 mm. An array of secondary optical elements may also be provided, which extend between the array of primary lenses and the array of solar cells.

Abstract translation: CPV模块包括其上具有1mm 2或更小的太阳能电池阵列的背板。 背板互连网络也设在背板上。 该背板互连网络用于将太阳能电池阵列电连接在一起。 提供了与背板间隔开的前板。 该前板包括面向太阳能电池阵列的主镜阵列。 前板可以被配置为向太阳能电池阵列提供大于1000X的透镜到单元的光浓度。 为了实现这种1000X透镜到单元的光浓度，主透镜可以被配置为具有小于约4mm的透镜凹陷的平凸透镜。 还可以提供在主要透镜阵列和太阳能电池阵列之间延伸的次级光学元件阵列。

公开(公告)号：WO2008030960A3

公开(公告)日：2008-07-24

申请号：PCT/US2007077759

申请日：2007-09-06

Applicant: UNIV ILLINOIS ,  ROGERS JOHN A ,  MEITL MATTHEW ,  SUN YUGANG ,  KO HEUNG CHO ,  CARLSON ANDREW ,  CHOI WON MOOK ,  STOYKOVICH MARK ,  JIANG HANQING ,  HUANG YONGGANG

Inventor： ROGERS JOHN A ,  MEITL MATTHEW ,  SUN YUGANG ,  KO HEUNG CHO ,  CARLSON ANDREW ,  CHOI WON MOOK ,  STOYKOVICH MARK ,  JIANG HANQING ,  HUANG YONGGANG

IPC: H01B7/06 ,  H01R35/00

CPC classification number: H01L27/0688 ,  B81B3/0078 ,  B82Y10/00 ,  H01L21/6835 ,  H01L21/8221 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/1292 ,  H01L27/1446 ,  H01L27/281 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/16 ,  H01L29/1602 ,  H01L29/1606 ,  H01L29/20 ,  H01L29/7781 ,  H01L29/7842 ,  H01L29/78681 ,  H01L29/78696 ,  H01L31/0203 ,  H01L51/0097 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/30105 ,  H05K1/0283 ,  H05K1/0313 ,  H05K3/20 ,  H05K2201/0133 ,  H05K2201/09045 ,  H05K2203/0271 ,  H01L2924/00 ,  H01L2224/80001 ,  H01L2924/00012

Abstract: In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Abstract translation: 一方面，本发明提供了拉伸，压缩，弯曲或其它变形时能够提供良好性能的可拉伸和可选择的可印刷的部件，例如半导体和电子电路，以及制造或调谐这种可拉伸部件的相关方法。 对于一些应用而言，优选的可拉伸半导体和电子电路除了是可拉伸的之外是柔性的，因此能够沿着一个或多个轴显着地伸长，弯曲，弯曲或其它变形。 此外，本发明的可拉伸半导体和电子电路适用于宽范围的器件配置，以提供完全灵活的电子和光电器件。

公开(公告)号：WO2011156344A4

公开(公告)日：2012-07-26

申请号：PCT/US2011039408

申请日：2011-06-07

Applicant: SEMPRIUS INC ,  MEITL MATTHEW ,  CARR JOSEPH ,  BURROUGHS SCOTT

Inventor： MEITL MATTHEW ,  CARR JOSEPH ,  BURROUGHS SCOTT

IPC: H01L31/052 ,  G09F13/00

CPC classification number: H01L31/0232 ,  G09F9/3026 ,  G09F9/33 ,  G09F9/35 ,  G09F27/007 ,  H01L31/0543 ,  H01L31/173 ,  H02S40/22 ,  Y02E10/52

Abstract: A concentrated photovoltaic and display apparatus includes a backplane substrate, a plurality of photovoltaic elements distributed over the backplane substrate, a plurality of display elements distributed over the backplane substrate between the photovoltaic elements, and an optical element positioned over the backplane substrate, the photovoltaic elements, and the display elements. The optical element is configured to concentrate incident light propagating in a direction substantially parallel to an optical axis thereof onto the photovoltaic elements. The optical element is further configured to direct light reflected or emitted from the display elements in a direction that is not substantially parallel to the optical axis of the optical element. Related fabrication methods and arrays including the apparatus are also discussed.

Abstract translation: 集中的光伏和显示装置包括背板基板，分布在背板基板上的多个光电元件，分布在光电元件之间的背板基板上的多个显示元件和位于背板基板上的光学元件，光电元件 ，和显示元件。 光学元件被配置为将沿其基本上平行于其光轴的方向传播的入射光集中到光伏元件上。 所述光学元件还被配置为在不基本上平行于所述光学元件的光轴的方向上引导从所述显示元件反射或发射的光。 还讨论了包括该装置的相关制造方法和阵列。

公开(公告)号：WO2012027458A1

公开(公告)日：2012-03-01

申请号：PCT/US2011/048945

申请日：2011-08-24

Applicant: SEMPRIUS, INC. ,  BOWER, Christopher ,  MENARD, Etienne ,  MEITL, Matthew

Inventor： BOWER, Christopher ,  MENARD, Etienne ,  MEITL, Matthew

IPC: H01L23/58

CPC classification number: H01L33/62 ,  G01R31/26 ,  G01R31/2644 ,  H01L21/308 ,  H01L21/6835 ,  H01L22/14 ,  H01L22/30 ,  H01L22/32 ,  H01L25/0753 ,  H01L33/16 ,  H01L33/30 ,  H01L33/34 ,  H01L33/48 ,  H01L2221/6835 ,  H01L2221/68381 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A substrate includes an anchor area (30) physically secured to a surface of the substrate (10) and at least one printable electronic component (20). The at least one printable electronic component includes an active layer (14) having one or more active elements thereon, and is suspended over the surface of the substrate by electrically conductive breakable tethers (40). The electrically conductive breakable tethers include an insulating layer and a conductive layer thereon that physically secure and electrically connect the at least one printable electronic component to the anchor area, and are configured to be preferentially fractured responsive to pressure applied thereto. Related methods of fabrication and testing are also discussed.

Abstract translation: 衬底包括物理地固定到衬底（10）的表面上的锚定区域（30）和至少一个可印刷的电子部件（20）。 所述至少一个可印刷电子部件包括其上具有一个或多个有源元件的有源层（14），并且通过导电可破坏的系绳（40）悬挂在基板的表面上。 导电可破裂系绳包括绝缘层和导电层，其物理地固定和电连接至少一个可印刷的电子部件到锚定区域，并且被配置为响应于施加到其上的压力而优先断裂。 还讨论了相关的制造和测试方法。

公开(公告)号：WO2012018997A3

公开(公告)日：2012-02-09

申请号：PCT/US2011/046575

申请日：2011-08-04

Applicant: SEMPRIUS, INC. ,  MEITL, Matthew ,  BOWER, Christopher ,  MENARD, Etienne ,  CARTER, James ,  GRAY, Allen ,  BONAFEDE, Salvatore

Inventor： MEITL, Matthew ,  BOWER, Christopher ,  MENARD, Etienne ,  CARTER, James ,  GRAY, Allen ,  BONAFEDE, Salvatore

IPC: H01L21/306 ,  H01L21/78 ,  H01L31/00

Abstract: A method of fabricating transferable semiconductor devices includes providing a release layer including indium aluminum phosphide on a substrate, and providing a support layer on the release layer. The support layer and the substrate include respective materials, such as arsenide-based materials, such that the release layer has an etching selectivity relative to the support layer and the substrate. At least one device layer is provided on the support layer. The release layer is selectively etched without substantially etching the support layer and the substrate. Related structures and methods are also discussed.

公开(公告)号：WO2011156344A2

公开(公告)日：2011-12-15

申请号：PCT/US2011/039408

申请日：2011-06-07

Applicant: SEMPRIUS, INC. ,  MEITL, Matthew ,  CARR, Joseph ,  BURROUGHS, Scott

Inventor： MEITL, Matthew ,  CARR, Joseph ,  BURROUGHS, Scott

IPC: H01L31/052

CPC classification number: H01L31/0232 ,  G09F9/3026 ,  G09F9/33 ,  G09F9/35 ,  G09F27/007 ,  H01L31/0543 ,  H01L31/173 ,  H02S40/22 ,  Y02E10/52

Abstract: A concentrated photovoltaic and display apparatus includes a backplane substrate, a plurality of photovoltaic elements distributed over the backplane substrate, a plurality of display elements distributed over the backplane substrate between the photovoltaic elements, and an optical element positioned over the backplane substrate, the photovoltaic elements, and the display elements. The optical element is configured to concentrate incident light propagating in a direction substantially parallel to an optical axis thereof onto the photovoltaic elements. The optical element is further configured to direct light reflected or emitted from the display elements in a direction that is not substantially parallel to the optical axis of the optical element. Related fabrication methods and arrays including the apparatus are also discussed.

Abstract translation: 集中的光伏和显示装置包括背板基板，分布在背板基板上的多个光电元件，分布在光电元件之间的背板基板上的多个显示元件和位于背板基板上的光学元件，光电元件 ，和显示元素。 光学元件被配置为将在其基本上平行于其光轴的方向上传播的入射光集中到光伏元件上。 所述光学元件还被配置为在不基本上平行于所述光学元件的光轴的方向上引导从所述显示元件反射或发射的光。 还讨论了包括该装置的相关制造方法和阵列。

公开(公告)号：WO2008036837A3

公开(公告)日：2008-03-27

申请号：PCT/US2007/079070

申请日：2007-09-20

Applicant: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS ,  ROGERS, John, A. ,  NUZZO, Ralph, G. ,  MEITL, Matthew ,  KO, Heung Cho ,  YOON, Jongseung ,  MENARD, Etienne ,  BACA, Alfred, J.

Inventor： ROGERS, John, A. ,  NUZZO, Ralph, G. ,  MEITL, Matthew ,  KO, Heung Cho ,  YOON, Jongseung ,  MENARD, Etienne ,  BACA, Alfred, J.

IPC: H01L21/00 ,  H01L21/30

Abstract: Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.