公开(公告)号：WO2012020290A2

公开(公告)日：2012-02-16

申请号：PCT/IB2011001724

申请日：2011-07-26

Applicant: ST MICROELECTRONICS SRL ,  SAGGIO MARIO GIUSEPPE ,  MURABITO DOMENICO ,  FIORE LETTERIO ,  MORALE GIUSEPPE ,  ARENA GIUSEPPE

Inventor： SAGGIO MARIO GIUSEPPE ,  MURABITO DOMENICO ,  FIORE LETTERIO ,  MORALE GIUSEPPE ,  ARENA GIUSEPPE

CPC classification number: H01L21/762 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3247 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/1095 ,  H01L29/42376 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

Abstract: A process for manufacturing a semiconductor device (10; 10') envisages the steps of: providing a semiconductor material body (2) having at least one deep trench (4) that extends through said body of semiconductor material starting from a top surface (2a) thereof; and filling the deep trench (4) via an epitaxial growth of semiconductor material, thereby forming a columnar structure (8) within the body of semiconductor material (2). The manufacturing process further envisages the step of modulating the epitaxial growth by means of a concurrent chemical etching of the semiconductor material that is undergoing epitaxial growth so as to obtain a compact filling free from voids of the deep trench (4); in particular, a flow of etching gas is introduced into the same reaction environment as that of the epitaxial growth, wherein a flow of source gas is supplied for the same epitaxial growth.

Abstract translation: 一种用于制造半导体器件（10; 10'）的方法，设想的步骤是：提供半导体材料体（2），该半导体材料体（2）具有从顶表面（2a）开始延伸穿过半导体材料体的至少一个深沟槽（4） ）; 以及通过半导体材料的外延生长填充深沟槽（4），从而在半导体材料（2）的主体内形成柱状结构（8）。 制造工艺进一步设想通过正在进行外延生长的半导体材料的同时化学蚀刻来调制外延生长的步骤，从而获得没有深沟槽（4）的空隙的紧密填充物。 特别地，将蚀刻气体流引入到与外延生长相同的反应环境中，其中为相同的外延生长提供源气体的流动。

公开(公告)号：WO2013128480A9

公开(公告)日：2013-09-06

申请号：PCT/IT2012/000060

申请日：2012-02-28

Applicant: STMICROELECTRONICS S.R.L. ,  MURABITO Domenico ,  SAGGIO Mario Giuseppe

Inventor： MURABITO Domenico ,  SAGGIO Mario Giuseppe

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/08 ,  H01L21/02 ,  H01L21/336

Abstract: A vertical-conduction electronic device (100; 150), comprising: a semiconductor wafer (1) including a semiconductor layer (2, 3) having a first side (3a), a first type of conductivity (N), and a first doping level; a first body region (32) and a second body region (34), which have a second type of conductivity (P) and extend in the semiconductor layer (2, 3); an enriched region (12), having the first type of conductivity and a second doping " level higher than the first doping level, which extends in the semiconductor layer facing the first side (3a), between the first and second body regions (32, 34); a dielectric filling region (20), which extends in the semiconductor layer, facing the first side (3a), and completely surrounded by the enriched region (12); and a gate structure (29), which extends on the first side (3a) on the enriched region (12), on the dielectric filling region (20), on part of the first body region (32), and on part of the second body region (34).

公开(公告)号：WO2013128480A1

公开(公告)日：2013-09-06

申请号：PCT/IT2012/000060

申请日：2012-02-28

Applicant: STMICROELECTRONICS S.R.L. ,  MURABITO Domenico ,  SAGGIO Mario Giuseppe

Inventor： MURABITO Domenico ,  SAGGIO Mario Giuseppe

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/08 ,  H01L21/02 ,  H01L21/336

CPC classification number: H01L29/7802 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66712 ,  H01L29/7395

Abstract: A vertical-conduction electronic device (100; 150), comprising: a semiconductor wafer (1) including a semiconductor layer (2, 3) having a first side (3a), a first type of conductivity (N), and a first doping level; a first body region (32) and a second body region (34), which have a second type of conductivity (P) and extend in the semiconductor layer (2, 3); an enriched region (12), having the first type of conductivity and a second doping " level higher than the first doping level, which extends in the semiconductor layer facing the first side (3a), between the first and second body regions (32, 34); a dielectric filling region (20), which extends in the semiconductor layer, facing the first side (3a), and completely surrounded by the enriched region (12); and a gate structure (29), which extends on the first side (3a) on the enriched region (12), on the dielectric filling region (20), on part of the first body region (32), and on part of the second body region (34).

Abstract translation: 一种垂直导电电子器件（100; 150），包括：半导体晶片（1），包括具有第一侧（3a），第一导电类型（N）和第一掺杂的半导体层（2,3） 水平; 具有第二导电类型（P）并在半导体层（2,3）中延伸的第一体区（32）和第二体区（34）; 在所述第一和第二体区域（32,32）之间具有第一类型的导电性和比第一掺杂级别高的第二掺杂的富集区域（12），其在面向第一侧面（3a）的半导体层中延伸， 电介质填充区域（20），其在所述半导体层中延伸，面向所述第一侧面（3a），并且被所述富集区域（12）完全包围;以及栅极结构（29），其在第一 在富集区域（12）上的介电填充区域（20）上，第一体区域（32）的一部分上以及第二体区域（34）的一部分上的侧面（3a）。

公开(公告)号：WO2012020290A3

公开(公告)日：2012-02-16

申请号：PCT/IB2011/001724

申请日：2011-07-26

Applicant: STMICROELECTRONICS S.R.L. ,  SAGGIO, Mario, Giuseppe ,  MURABITO, Domenico ,  FIORE, Letterio ,  MORALE, Giuseppe ,  ARENA, Giuseppe

Inventor： SAGGIO, Mario, Giuseppe ,  MURABITO, Domenico ,  FIORE, Letterio ,  MORALE, Giuseppe ,  ARENA, Giuseppe

IPC: H01L21/20 ,  H01L29/739 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: A process for manufacturing a semiconductor device (10; 10') envisages the steps of: providing a semiconductor material body (2) having at least one deep trench (4) that extends through said body of semiconductor material starting from a top surface (2a) thereof; and filling the deep trench (4) via an epitaxial growth of semiconductor material, thereby forming a columnar structure (8) within the body of semiconductor material (2). The manufacturing process further envisages the step of modulating the epitaxial growth by means of a concurrent chemical etching of the semiconductor material that is undergoing epitaxial growth so as to obtain a compact filling free from voids of the deep trench (4); in particular, a flow of etching gas is introduced into the same reaction environment as that of the epitaxial growth, wherein a flow of source gas is supplied for the same epitaxial growth.