公开(公告)号：JP2000090280A

公开(公告)日：2000-03-31

申请号：JP13046799

申请日：1999-04-01

Applicant: HARTOG SCOTT ,  MANTOR MICHAEL ,  JOHN AUSTIN CARRY ,  PIAZZA THOMAS A ,  TAYLOR RALPH CLAYTON ,  RADECKI MATTHEW

Inventor： HARTOG SCOTT ,  MANTOR MICHAEL ,  JOHN AUSTIN CARRY ,  PIAZZA THOMAS A ,  TAYLOR RALPH CLAYTON ,  RADECKI MATTHEW

IPC: G06F12/00 ,  G06F12/02 ,  G06T1/60 ,  G06T11/20 ,  G06T11/40 ,  G11C7/10

Abstract: PROBLEM TO BE SOLVED: To efficiently store data in a memory unit by constituting a device so as to decrease the number of page breaks when exchanging data from a memory. SOLUTION: Polygons A and B are linearly rasterized while using data from a memory 70, for example, for decreasing the number of page breaks to occur in the case of rasterizing a polygon. As a result of tiled configuration concerning pages in the memory 70, the page breaks occur caused by just a little scan lines and it is clearly a contrast with conventional procedures. Concerning the polygon A, for example, any page break does not occur on a scan line 1-6 at all and the first page break occurs between scan line segments 6 and 7. The combination of tiled memory configuration of the polygon A and its linear rasterizing causes page breaks totally for 27 pages, and while rasterizing the entire polygon, just one page break occurs between scan lines 9 and 10.

公开(公告)号：CA2267870A1

公开(公告)日：1999-10-01

申请号：CA2267870

申请日：1999-03-31

Applicant: RADECKI MATTHEW ,  CAREY JOHN AUSTIN ,  PIAZZA THOMAS A ,  HARTOG SCOTT ,  MANTOR MICHAEL ,  TAYLOR RALPH CLAYTON

Inventor： RADECKI MATTHEW ,  CAREY JOHN AUSTIN ,  PIAZZA THOMAS A ,  HARTOG SCOTT ,  MANTOR MICHAEL ,  TAYLOR RALPH CLAYTON

IPC: G06F12/00 ,  G06F12/02 ,  G06T1/60 ,  G06T11/20 ,  G06T11/40 ,  G11C7/10

Abstract: A computer graphics system and a method of configuring data in a memory unit of a computer graphics system. Generally, the data is configured such that the number of memory page breaks is reduced when data is accessed from the memory for image computation. For example, when the memory is used to store pixel values, each page of the memory is comprised of pixel values for a rectangular or tile array of pixels. This increases the spatial coherence between the pixel values and the pixels of the polygons that are rasterized when the system renders an image. Preferably, a translation algorithm is provided to allow standard operating systems and software applications to work with the tiled configuration of the pixel values in the memory. This algorithm translates the scalar memory address initially provided by the operating system or the software application, and translates that first scalar memory address to a second scalar memory address that will properly access the value for the pixel conventionally associated with the first scalar memory address.