Abstract:
A polishing pad having a body comprising fibers embedded in a matrix polymer formed by a reaction of polymer precursors. The fibers define interstices, and the precursors fill these interstices substantially completely before completion of the reaction. The pad may include a thin layer of free fibers at its polishing surface. A segment of at least a portion of the free fibers are embedded in the adjacent body of the polymer and fibers. The fibers may be separate, or in the form of a woven or non-woven web.
Abstract:
A method of determining a stopping power of a design structure with respect to a traveling particle. The method includes (i) providing design information of the design structure comprising a back-end-of-line layer which includes N interconnect layers, N being a positive integer, (ii) dividing each interconnect layer of the N interconnect layers into multiple pixels, and (iii) determining a first path of the traveling particle in a first interconnect layer of the N interconnect layers, (iv) identifying M path pixels of the multiple pixels of the first interconnect layer on the first path of the traveling particle, M being a positive integer, and (v) determining a first loss energy lost by the traveling particle due to its completely passing through a first pixel of the M path pixels.
Abstract:
Grooves are formed in a CMP (12) pad by positioning the pad on a supporting surface with a working surface (22) of the pad in spaced relation opposite to a router bit (24) and at least one projecting stop member (33) adjacent to the router bit, an outer end portion of the bit projecting beyond the stop. When the bit is rotated, relative axial movement between the bit and the pad causes the outer end portion of the bit to cut an initial recess in the pad. Relative lateral movement between the rotating bit and the pad then forms a groove which extends laterally away from the recess and has a depth substantially the same as that of the recess. Different lateral movements between the bit and the pad are used to form a variety of groove patterns, the depths of which are precisely controlled by the stop member(s). The grooves may be formed in the polishing surface and/or the rear opposite surface of the pad and passages may be provided for interconnecting the rear grooves with the polishing surface or the front grooves. Grooves in the polishing surface may be provided with outlets through which a polishing slurry may flow while the polishing surface is in contact with a workpiece surface.
Abstract:
A method of determining a stopping power of a design structure with respect to a traveling particle. The method includes (i) providing design information of the design structure comprising a back-end-of-line layer which includes N interconnect layers, N being a positive integer, (ii) dividing each interconnect layer of the N interconnect layers into multiple pixels, and (iii) determining a first path of the traveling particle in a first interconnect layer of the N interconnect layers, (iv) identifying M path pixels of the multiple pixels of the first interconnect layer on the first path of the traveling particle, M being a positive integer, and (v) determining a first loss energy lost by the traveling particle due to its completely passing through a first pixel of the M path pixels.
Abstract:
A structure and a method for reduction of soft error rates in integrated circuits. The structure including: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level nearer the semiconductor substrate than the uppermost wiring level; and an alpha particle blocking layer on a top surface of the uppermost wiring level of the one or more wiring levels, the blocking layer comprising metal wires and a dielectric material, the blocking layer having a combination of a thickness of the blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of a selected energy or less striking the blocking layer from penetrating into the stack of one or more wiring levels or the substrate.
Abstract:
A polishing pad having a body comprising fibers embedded in a matrix polymer formed by a reaction of polymer precursors. The fibers define interstices, and the precursors fill these interstices substantially completely before completion of the reaction. The pad may include a thin layer of free fibers at its polishing surface. A segment of at least a portion of the free fibers are embedded in the adjacent body of the polymer and fibers. The fibers may be separate, or in the form of a woven or non-woven web.
Abstract:
A metal interconnect structure and a method of manufacturing the metal interconnect structure. Manganese (Mn) is incorporated into a copper (Cu) interconnect structure in order to modify the microstructure to achieve bamboo-style grain boundaries in sub-90nm technologies. Preferably, bamboo grains are separated at distances less than the "Blech" length so that copper (Cu) diffusion through grain boundaries is avoided. The added Mn also triggers the growth of Cu grains down to the bottom surface of the metal line so that a true bamboo microstructure reaching to the bottom surface is formed and the Cu diffusion mechanism along grain boundaries oriented along the length of the metal line is eliminated.
Abstract:
A structure and a method for reduction of soft error rates in integrated circuits. The structure including: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level nearer the semiconductor substrate than the uppermost wiring level; and an alpha particle blocking layer on a top surface of the uppermost wiring level of the one or more wiring levels, the blocking layer comprising metal wires and a dielectric material, the blocking layer having a combination of a thickness of the blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of a selected energy or less striking the blocking layer from penetrating into the stack of one or more wiring levels or the substrate.
Abstract:
Defects on the edge of copper interconnects for back end of the line semiconductor devices are alleviated by an interconnect that comprises an impure copper seed layer (440). The impure copper seed layer (440) covers a barrier layer (230), which covers an insulating layer (115) that has an opening. Electroplated copper fills the opening in the insulating layer (115). Through a chemical mechanical polish, the barrier layer (230), the impure copper seed layer (440) derived from an electroplated copper bath, and the electroplated copper are planarized to the insulating layer (115).