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    Circuit employing MOSFETs and corresponding method
    4.
    发明授权
    Circuit employing MOSFETs and corresponding method 有权

    公开(公告)号：US11652457B2

    公开(公告)日：2023-05-16

    申请号：US17362276

    申请日：2021-06-29

    Applicant: STMicroelectronics Design and Application S.R.O.

    Inventor： Sandor Petenyi

    IPC: H03F3/45 ,  H03F1/02 ,  H03F1/30

    CPC classification number: H03F3/45179 ,  H03F1/0205 ,  H03F1/301 ,  H03F2200/78 ,  H03F2203/45

    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

    METHODS AND APPARATUS FOR PROTECTING WIRELESS CHARGING RECEIVERS
    7.
    发明申请
    METHODS AND APPARATUS FOR PROTECTING WIRELESS CHARGING RECEIVERS 有权

    公开(公告)号：US20210367456A1

    公开(公告)日：2021-11-25

    申请号：US16878782

    申请日：2020-05-20

    Applicant: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.

    Inventor： Michal Toula

    IPC: H02J50/80 ,  H02J50/12 ,  H02J7/00

    Abstract: A wireless charging receiver includes a controller configured to determine that a first overvoltage threshold is met and based thereon enable a first switch to couple an output of a rectifier to electrical ground through a first resistor, to determine that a second overvoltage threshold is met and based thereon enable receive resonant circuit switches to short circuit a receive resonant circuit, to determine that a hysteresis threshold is met and based thereon disable the receive resonant circuit switches to open circuit the receive resonant circuit, and to determine that a hysteresis cycle threshold is met and that the receive resonant circuit switches are disabled and based thereon enable the second switch to couple the second resistor to the electrical ground and to communicate to wireless charging transmitter to decrease the power level on wireless charging receiver side.

    CIRCUIT EMPLOYING MOSFETS AND CORRESPONDING METHOD
    9.
    发明申请
    CIRCUIT EMPLOYING MOSFETS AND CORRESPONDING METHOD 有权

    公开(公告)号：US20210328563A1

    公开(公告)日：2021-10-21

    申请号：US17362276

    申请日：2021-06-29

    Applicant: STMicroelectronics Design and Application S.R.O.

    Inventor： Sandor PETENYI

    IPC: H03F3/45 ,  H03F1/02 ,  H03F1/30

    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

    PROCESSING SYSTEM COMPRISING A QUEUED SERIAL PERIPHERAL INTERFACE, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD
    10.
    发明申请
    PROCESSING SYSTEM COMPRISING A QUEUED SERIAL PERIPHERAL INTERFACE, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD 有权

    公开(公告)号：US20210303504A1

    公开(公告)日：2021-09-30

    申请号：US17199418

    申请日：2021-03-11

    Applicant: STMicroelectronics Application GMBH ,  STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.

    Inventor： Rolf Nandlinger ,  Radek Olexa

    IPC: G06F13/42 ,  G06F13/40 ,  G06F13/16 ,  G06F9/30

    Abstract: An embodiment processing system comprises a queued SPI circuit, which comprises a hardware SPI communication interface, an arbiter and a plurality of interface circuits. Each interface circuit comprises a transmission FIFO memory, a reception FIFO memory and an interface control circuit. The interface control circuit is configured to receive first data packets and store them to the transmission FIFO memory. The interface control circuit sequentially reads the first data packets from the transmission FIFO memory, extracts at least one transmission data word, and provides the extracted word to the arbiter. The interface control circuit receives from the arbiter a reception data word and stores second data packets comprising the received reception data word to the reception FIFO memory. The interface control circuit sequentially reads the second data packets from the reception FIFO memory and transmits them to the digital processing circuit.

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