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    Test handler apparatus for SMD (surface mount devices) BGA (ball grid arrays) and CSP (chip scale packages)
    1.
    发明专利
    Test handler apparatus for SMD (surface mount devices) BGA (ball grid arrays) and CSP (chip scale packages) 未知

    公开(公告)号：SG119155A1

    公开(公告)日：2006-02-28

    申请号：SG200203993

    申请日：2002-07-01

    Applicant: STMICROELECTRONICS SDN BHD

    Inventor： LEE BOON SENG ,  TAN KEK YONG

    IPC: G01R31/28 ,  G01R31/316

    Abstract: A test handler apparatus (1), having a treatment area (3); a testing station (5) in the treatment area; and an output unit (9) connected to an output of the treatment area. An input unit (2) picks singulated or stripped packages (30) and unloads them on carrier boats (12) in a loading zone (4); a conveyor mechanism (20, 6, 26, 47) transfers the carrier boats (12) from the loading zone through the treatment area to the testing station and from the testing station to the output unit (9). In practice, the carrier boat (4) forms a universal carrier which is able to contain multiple singulated or strip packages for the purpose of testing. Placing packages onto carriers with standardized dimension allows handler equipment to accommodate the packages in singulated or strip condition.

    TEST HANDLER APPARATUS FOR SMD ( SURFACE MOUNT DEVICES), BGA ( BALL GRID ARRAYS) AND CSP ( CHIP SCALE PACKAGES)
    4.
    发明专利
    TEST HANDLER APPARATUS FOR SMD ( SURFACE MOUNT DEVICES), BGA ( BALL GRID ARRAYS) AND CSP ( CHIP SCALE PACKAGES) 未知

    公开(公告)号：MY131859A

    公开(公告)日：2007-09-28

    申请号：MYPI20013142

    申请日：2001-06-30

    Applicant: STMICROELECTRONICS SDN BHD

    Inventor： SENG LEE BOON ,  YONG TAN KEK

    IPC: G01R31/26 ,  G01R31/28

    Abstract: A TEST HANDLER APPARATUS (1), HAVING A TREATMENT AREA (3); A TESTING STATION (5) IN THE TREATMENT AREA; AND AN OUTPUT UNIT (9) CONNECTED TO AN OUTPUT OF THE TREATMENT AREA (3). AN INPUT UNIT (2) PICKS SINGULATED OR STRIPPED PACKAGES (30) AND UNLOADS THEM ON CARRIER BOATS (12) IN A LOADING ZONE (4); A CONVEYOR MECHANISM TRANSFERS THE CARRIER BOATS (12) FROM THE LOADING ZONE (4) THROUGH THE TREATMENT AREA (3) TO THE TESTING STATION (5) AND FROM THE TESTING STATION (5) TO THE OUTPUT UNIT (9).IN PRACTICE, THE CARRIER BOAT FORMS A UNIVERSAL CARRIER WHICH IS ABLE TO CONTAIN MULTIPLE SINGULATED OR STRIP PACKAGES (30) FOR THE PURPOSE OF TESTING. PLACING PACKAGES ONTO CARRIERS WITH STANDARDIZED DIMENSION ALLOWS HANDLER EQUIPMENT TO ACCOMMODATE THE PACKAGES IN SINGULATED OR STRIP CONDITION.(FIG 2)

    7.
    发明专利
    未知

    公开(公告)号：IT1320556B1

    公开(公告)日：2003-12-10

    申请号：ITTO20000739

    申请日：2000-07-26

    Applicant: ST MICROELECTRONICS SRL ,  ST MICROELECTRONICS PTE LTD ,  STMICROELECTRONICS SDN BHD

    Inventor： CIGADA ANDREA ,  SHECHTER PIERRE YVES ,  KRITHIVASAN SIVAKUMA

    IPC: B08B7/00

    Abstract: A process for cleaning an integrated circuit package surface, comprising the steps of introducing the integrated circuit inside a plasma chamber; and of exposing the integrated circuit to a physical plasma obtained starting from a gas consisting of pure argon or any other noble gas having, in the plasma state, the behavior of a halogen, for example helium. The argon pla sma is obtained using the following energization parameters: energization time, 12-13 seconds; energization power, 140-160 W; plasma chamber pressure, 190-210 millitorr; and energization frequency, between 1 kHz and 100 GHz.

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