INTEGRATED CIRCUIT CHIP WITH REPEATER FLOPS AND METHOD FOR AUTOMATED DESIGN OF SAME
    2.
    发明申请
    INTEGRATED CIRCUIT CHIP WITH REPEATER FLOPS AND METHOD FOR AUTOMATED DESIGN OF SAME 审中-公开
    集成电路芯片与自动设计的复用浮标和方法

    公开(公告)号:WO2008021489A3

    公开(公告)日:2008-05-29

    申请号:PCT/US2007018245

    申请日:2007-08-17

    CPC classification number: G06F17/5045 G06F2217/84

    Abstract: An integrated circuit (IC) chip having repeaters for propagating signals along relatively long wires that extend between and among lower-level physical blocks of the IC chip, wherein the repeaters are implemented as clocked flip-flops (or "repeater flops"). A method for automatically inserting and allocating such repeater flops during the logical and physical design of the IC chip is also provided.

    Abstract translation: 一种集成电路(IC)芯片,其具有用于沿着在IC芯片的下级物理块之间延伸的较长导线传播信号的中继器,其中中继器被实现为时钟触发器(或“中继器”)。 还提供了在IC芯片的逻辑和物理设计期间自动插入和分配这种中继器的方法。

    INTEGRATED CIRCUIT CHIP WITH REPEATER FLOPS AND METHOD FOR AUTOMATED DESIGN OF SAME
    3.
    发明申请
    INTEGRATED CIRCUIT CHIP WITH REPEATER FLOPS AND METHOD FOR AUTOMATED DESIGN OF SAME 审中-公开
    带有中继器的集成电路芯片及其自动设计方法

    公开(公告)号:WO2008021489A2

    公开(公告)日:2008-02-21

    申请号:PCT/US2007/018245

    申请日:2007-08-17

    CPC classification number: G06F17/5045 G06F2217/84

    Abstract: An integrated circuit (IC) chip having repeaters for propagating signals along relatively long wires that extend between and among lower-level physical blocks of the IC chip, wherein the repeaters are implemented as clocked flip-flops (or "repeater flops"). A method for automatically inserting and allocating such repeater flops during the logical and physical design of the IC chip is also provided.

    Abstract translation: 具有转发器的集成电路(IC)芯片用于沿着在IC芯片的较低级物理块之间延伸的较长导线传播信号,其中转发器被实现为时钟触发器( 或“中继器触发器”)。 还提供了在IC芯片的逻辑和物理设计期间自动插入和分配这种中继器触发器的方法。

Patent Agency Ranking