公开(公告)号：WO2007075962A2

公开(公告)日：2007-07-05

申请号：PCT/US2006/048926

申请日：2006-12-20

Applicant: ALTERA CORPORATION ,  VENKATA, Ramanand ,  PATEL, Rakesh H. ,  LEE, Chong H.

Inventor： PATEL, Rakesh H. ,  LEE, Chong H.

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/17744 ,  H03K19/17784

Abstract: In a programmable logic device, some or all of the parallel interconnect resources are replaced by serial interconnect resources within the device. Some or all of the functional blocks on the device are supplemented with serial interfaces. Althugh this makes the functional blocks more complex, it allows a significant reduction in the area consumed by interconnect resources. This translates into a significant reduction in device power consumption. The serial interfaces may operate synchronously from a global device clock (such as a PLL). In some cases, serial interfaces that are provided in the input/output blocks for external signalling can be omitted because the serial interfaces in the functional blocks can take over the external serial interface function as well, although in those cases the serial interfaces in the functional blocks would have to be more complex because they would have to be able to operate asynchronously with external devices.

Abstract translation: 在可编程逻辑器件中，部分或全部并行互连资源由器件内的串行互连资源代替。 设备上的部分或全部功能块被补充串行接口。 这使得功能块更复杂，它可以显着减少互连资源消耗的面积。 这意味着设备功耗的显着降低。 串行接口可以与全局设备时钟（如PLL）同步工作。 在某些情况下，可以省略输入/输出块中提供的用于外部信号的串行接口，因为功能块中的串行接口也可以接管外部串行接口功能，尽管在这些情况下，功能中的串行接口 块将不得不更复杂，因为它们必须能够与外部设备异步操作。

公开(公告)号：WO2007075962A3

公开(公告)日：2007-08-23

申请号：PCT/US2006048926

申请日：2006-12-20

Applicant: ALTERA CORP ,  VENKATA RAMANAND ,  PATEL RAKESH H ,  LEE CHONG H

Inventor： PATEL RAKESH H ,  LEE CHONG H

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/17744 ,  H03K19/17784

Abstract: In a programmable logic device, some or all of the parallel interconnect resources (24) are replaced by serial interconnect resources (25) within the device. Some or all of the functional blocks (21, 22, 23) on the device are supplemented with serial interfaces (30) . Although this makes the functional blocks more complex, it allows a significant reduction in the area consumed by interconnect resources. This translates into a significant reduction in device power consumption. The serial interfaces (30) may operate synchronously from a global device clock (such as a PLL) . In some cases, serial interfaces (30) that are provided in the input/output blocks (23) for external signalling can be omitted because the serial interfaces in the functional blocks can take over the external serial interface function as well, although in those cases the serial interfaces in the functional blocks (23) would have to be more complex because they would have to be able to operate asynchronously with external devices .

Abstract translation: 在可编程逻辑器件中，部分或全部并行互连资源（24）由器件内的串行互连资源（25）代替。 设备上的部分或全部功能块（21,22,23）被补充有串行接口（30）。 尽管这使得功能块更加复杂，但它允许显着减少互连资源消耗的面积。 这意味着设备功耗的显着降低。 串行接口（30）可以从全局设备时钟（例如PLL）同步地操作。 在一些情况下，由于功能块中的串行接口可以接管外部串行接口功能，所以可以省略在用于外部信号的输入/输出块（23）中提供的串行接口（30），尽管在这些情况下 功能块（23）中的串行接口必须更复杂，因为它们必须能够与外部设备异步操作。