낮은 롱텀 지터를 갖는 디지털 위상 고정 루프
    2.
    发明授权
    낮은 롱텀 지터를 갖는 디지털 위상 고정 루프 有权
    数字相位锁定低长度抖动环

    公开(公告)号:KR101278109B1

    公开(公告)日:2013-06-24

    申请号:KR1020120041062

    申请日:2012-04-19

    Inventor: 정덕균 김우석

    CPC classification number: H03L7/07 G04F10/005 H03L7/0991 H03L2207/50

    Abstract: PURPOSE: A digital phase locked loop which has a low long term jitter is provided to reduce power consumption and the size. CONSTITUTION: A first phase locked loop(1) includes a first digital control oscillator(200) in which a frequency of an output signal is controlled according to a first digital control code(M). The first digital control oscillator includes a second phase locked loop(200'). The second phase locked loop receives the first digital control code, controls a dividing ratio about a signal on a feedback path according to the first digital control code, and exists inside of the first phase locked loop. A dividing block(600) divides the output signal of the second phase locked loop and automatically selects a dividing ratio by using a control signal which controls the oscillator of the second phase locked loop. [Reference numerals] (280) DOC block; (600) Dividing block

    Abstract translation: 目的:提供具有低长期抖动的数字锁相环,以减少功耗和尺寸。 构成:第一锁相环(1)包括第一数字控制振荡器(200),其中根据第一数字控制码(M)控制输出信号的频率。 第一数字控制振荡器包括第二锁相环(200')。 第二锁相环接收第一数字控制码,根据第一数字控制码控制反馈路径上的信号的分频比,并且存在于第一锁相环内。 分割块(600)划分第二锁相环的输出信号,并通过使用控制第二锁相环的振荡器的控制信号来自动选择分频比。 (附图标记)(280)DOC块; (600)分隔块

    타임 디지털 컨버터
    3.
    发明授权
    타임 디지털 컨버터 有权
    数字转换器

    公开(公告)号:KR101278111B1

    公开(公告)日:2013-06-24

    申请号:KR1020130040219

    申请日:2013-04-12

    Inventor: 정덕균 김우석

    CPC classification number: G04F10/005 H03L7/0991 H03L2207/50

    Abstract: PURPOSE: A time digital converter is provided to reduce power consumption and to properly control a deduction range, a resolution, and a gain. CONSTITUTION: A fine time digital converter(140) senses a phase difference and has a fine resolution and a narrow detection range. A coarse time digital converter(130) has a coarse resolution and a wide detection range which senses a phase difference. An overflow detector(150) senses an overflow of the fine time digital converter. If the overflow detector does not sense an overflow, the coarse time digital converter saves electricity by stopping an operation. [Reference numerals] (110) Divider; (130) Coarse time digital converter; (140) Fine time digital converter; (150) Overflow detector; (170) Gain compensator

    Abstract translation: 目的:提供时间数字转换器以降低功耗,并适当地控制扣除范围,分辨率和增益。 构成:精细时间数字转换器(140)感测相位差,并且具有良好的分辨率和窄的检测范围。 粗时间数字转换器(130)具有粗分辨率和检测相位差的宽检测范围。 溢出检测器(150)感测精细时间数字转换器的溢出。 如果溢出检测器没有检测到溢出,则粗略数字转换器通过停止运行来节省电力。 (附图标记)(110)分隔线; (130)粗时数字转换器; (140)精细时间数字转换器; (150)溢流检测器; (170)增益补偿器

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