公开(公告)号：KR100742779B1

公开(公告)日：2007-07-26

申请号：KR1020060068369

申请日：2006-07-21

Applicant: 고려대학교 산학협력단

Inventor： 성만영 ,  이한신 ,  박형석

IPC: H01L29/70

Abstract: An insulated gate bipolar transistor using a multiple trench is provided to improve a latch-up characteristic by forming an oxide layer after a portion of a bipolar transistor in which a hole current path is formed is removed by a trench process. A polysilicon gate(220) is formed in the center of a cell in one cell pitch. A trench-type insulation region(210) is formed of the sidewall on the edge of the cell. An electrode(230) is formed between the polysilicon gate and the trench-type insulation region, made of a conductor. The polysilicon gate can have such a depth as to penetrate N-type and P-type regions of a high density and reach an N-type region of a low density.

Abstract translation: 提供使用多沟槽的绝缘栅双极晶体管，以通过沟槽工艺去除在其中形成有空穴电流路径的双极晶体管的一部分之后形成氧化物层来提高闩锁特性。 多晶硅栅极（220）以一个单元间距形成在单元的中央。 沟槽型绝缘区域（210）由单元边缘上的侧壁形成。 在多晶硅栅极和由导体制成的沟槽型绝缘区域之间形成电极（230）。 多晶硅栅极可以具有穿透高密度的N型区域和P型区域并且达到低密度的N型区域的深度。

公开(公告)号：KR100776827B1

公开(公告)日：2007-11-19

申请号：KR1020060108944

申请日：2006-11-06

Applicant: 고려대학교 산학협력단

Inventor： 성만영 ,  이한신

IPC: H01L29/73

CPC classification number: H01L29/0834 ,  H01L29/66333 ,  H01L29/7395

Abstract: An insulated gate bipolar transistor having a divided type anode and a method for manufacturing the same are provided to increase a switching speed and to reduce a resistance of an on-state by using an anode region divided by an insulating material. A cathode region(211) is formed by implanting an impurity into a front surface layer of silicon. A gate is formed with a gate insulating material and a gate conductor in a contacting state with the cathode region on the front surface layer of the silicon. A plurality of trenches is formed on a rear surface layer of the silicon. A divided type anode region(213) is divided into a plurality of regions by using an insulating material for filling the trenches. A drift region is formed to transfer a carrier between the cathode region and the divided type anode region. In the divided type anode region, a p type doped silicon region is divided into a plurality of regions and gaps between the divided p type doped silicon regions are filled with the insulating material.

Abstract translation: 提供具有分隔型阳极的绝缘栅双极晶体管及其制造方法，以通过使用由绝缘材料分隔的阳极区域来提高开关速度并降低导通状态的电阻。 通过将杂质注入到硅的前表面层中形成阴极区（211）。 栅极形成有栅极绝缘材料和与硅的前表面层上的阴极区域处于接触状态的栅极导体。 在硅的背面层上形成多个沟槽。 通过使用用于填充沟槽的绝缘材料将分割型阳极区域（213）分割成多个区域。 形成漂移区以在阴极区域和分隔型阳极区域之间传送载流子。 在分割型阳极区域中，p型掺杂硅区域被划分为多个区域，并且分隔的p型掺杂硅区域之间的间隙被绝缘材料填充。

公开(公告)号：KR100744845B1

公开(公告)日：2007-08-01

申请号：KR1020060068375

申请日：2006-07-21

Applicant: 고려대학교 산학협력단

Inventor： 성만영 ,  이한신 ,  박형석

IPC: H01L29/73

Abstract: An insulated gate bipolar transistor having multiple gates and a method for manufacturing the same are provided to improve a latch up characteristic by removing a hole current path through a trench process and forming then a gate. A first polycrystal silicon gate(210) is formed in a center portion of a cell, and a second polycrystal silicon gate is formed on a sidewall of the edge of the cell. A first electrode(220) of conductor is formed between the first polycrystal silicon gate and the second polycrystal silicon gate. A second electrode(230) made of conductor is formed adjacent to the second polycrystal silicon gate. The first polycrystal silicon gate penetrates an N-type region and a P-type region.

Abstract translation: 提供具有多个栅极的绝缘栅双极晶体管及其制造方法，以通过去除通过沟槽工艺的空穴电流路径并形成栅极来提高闩锁特性。 第一多晶硅栅极（210）形成在单元的中心部分中，第二多晶硅栅极形成在单元边缘的侧壁上。 在第一多晶硅栅极和第二多晶硅栅极之间形成导体的第一电极（220）。 由导体制成的第二电极（230）与第二多晶硅栅极相邻地形成。 第一多晶硅栅极穿透N型区域和P型区域。