公开(公告)号：KR100904518B1

公开(公告)日：2009-06-25

申请号：KR1020080000260

申请日：2008-01-02

Applicant: 고려대학교 산학협력단

Inventor： 정성우 ,  김도연 ,  이종성 ,  장형범 ,  공준호 ,  최진항

IPC: G11C29/00

CPC classification number: G06F12/0893 ,  G06F11/1008 ,  G06F12/0888

Abstract: A method for writing data on a data bit stream of a cache memory and a method for reading data from the data bit stream are provided to use a cache line that includes fault data bits, thereby improving a throughput of the cache memory. Existence of a fault data bit is decided based on a fault flag bit value included in a corresponding cache line(S20). If the fault data bit exists, it is decided whether a value written on the fault data bit is identical with a bit value corresponding to a fault data bit in a target data bit stream(S30). If so, a target data bit stream value is written on a data bit stream of the corresponding cache line(S40). If the value is not identical, the target data bit stream value is written on a data bit stream of another cache line or the data bit stream of the corresponding cache line(S60).

Abstract translation: 提供了一种用于在高速缓冲存储器的数据比特流上写入数据的方法和用于从数据比特流读取数据的方法，以使用包括故障数据比特的高速缓存线，从而提高高速缓冲存储器的吞吐量。 基于包括在对应的高速缓存行中的故障标志位值来确定故障数据位的存在（S20）。 如果存在故障数据位，则确定写在故障数据位上的值是否与目标数据位流中的故障数据位对应的位值相同（S30）。 如果是，则将目标数据位流值写入对应的高速缓存行的数据位流（S40）。 如果该值不相同，则将目标数据比特流值写入另一高速缓存行的数据比特流或对应的高速缓存行的数据比特流（S60）。

公开(公告)号：KR1020100046414A

公开(公告)日：2010-05-07

申请号：KR1020080105244

申请日：2008-10-27

Applicant: 고려대학교 산학협력단

Inventor： 정성우 ,  공준호 ,  최진항

IPC: G06F1/08 ,  G06F1/32 ,  G06F9/00

Abstract: PURPOSE: A microprocessor system is provided to efficiently manage the energy/power consumption performance in a mobile environment and a ubiquitous environment by calculating an optimized DVFS level. CONSTITUTION: A microprocessor system includes an operating system(20) and a microprocessor(10). The operating system calculates a DVFS level, and the microprocessor controls an operating frequency or voltage according to the calculated DVFS level. The DVFS level calculation module(210) calculates the EDP or ED2P of the application program among the preset DVFS levels. The DVFS level calculation module selects the DVFS level of the minimum value.

Abstract translation: 目的：提供微处理器系统，通过计算优化的DVFS级别，有效地管理移动环境和无所不在的环境中的能源/功耗性能。 构成：微处理器系统包括操作系统（20）和微处理器（10）。 操作系统计算DVFS电平，微处理器根据计算的DVFS电平来控制工作频率或电压。 DVFS级计算模块（210）在预设的DVFS级别中计算应用程序的EDP或ED2P。 DVFS级别计算模块选择最小值的DVFS级别。

公开(公告)号：KR100975747B1

公开(公告)日：2010-08-12

申请号：KR1020080105244

申请日：2008-10-27

Applicant: 고려대학교 산학협력단

Inventor： 정성우 ,  공준호 ,  최진항

IPC: G06F1/08 ,  G06F1/32 ,  G06F9/00

Abstract: 본 발명은 마이크로 프로세서 시스템에 관한 것으로, 더욱 상세하게는 응용프로그램의 특성을 고려한 최적의 DVFS(Dynamic Voltage Frequency Scaling) 레벨을 산출하여 적용함으로써 에너지/전력 소모와 성능을 효율적으로 관리할 수 있는 마이크로 프로세서 시스템에 관한 것이다.
마이크로 프로세서, 운영체제, DVFS, 에너지/전력, 성능

公开(公告)号：KR1020100046416A

公开(公告)日：2010-05-07

申请号：KR1020080105246

申请日：2008-10-27

Applicant: 고려대학교 산학협력단

Inventor： 정성우 ,  장형범 ,  최진항

IPC: G06F12/08 ,  G06F12/02

Abstract: PURPOSE: An operating system of a cache memory is provided to extend the durability of a sensor node under a sensor network environment by using a cache memory even when the cache memory has a defect caused by a process change. CONSTITUTION: When a cache memory is manufactured, a defect caused by a process change is confirmed. If there is a defect, a defective block or defective cache line is extracted. An address of the defective block or defective cache line is stored and an algorithm is made out. Through the algorithm, a data replacement operation is performed for the rest block except the address.

Abstract translation: 目的：提供高速缓冲存储器的操作系统，以便即使当高速缓冲存储器具有由过程变化引起的缺陷时，通过使用高速缓冲存储器来在传感器网络环境下延长传感器节点的耐久性。 构成：制造高速缓冲存储器时，确认由过程变化引起的缺陷。 如果存在缺陷，则提取缺陷块或缺陷高速缓存行。 存储缺陷块或缺陷高速缓存行的地址，并且进行算法。 通过该算法，除了地址之外，对其余块执行数据替换操作。