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公开(公告)号：KR1020130069106A
公开(公告)日：2013-06-26
申请号：KR1020110136664
申请日：2011-12-16
Applicant: 국방과학연구소
Abstract: PURPOSE: An embedded software verifying device and an operating method thereof are provided to verify software functional demand and to increase the reliability of software by using an environment for monitoring and verifying the software. CONSTITUTION: An external signal simulation device(300) is connected with a test target device to transceive a signal and a host computer outputs a control command to the external signal simulation device. An agent module(140) receives monitoring information of the test target device and transmits the same to the host computer. If an event occurs during the operation of the test target device, a monitoring support module(130) transmits event information to the agent module. The host computer writes a software test process and controls a JTAG(Joint Test Action Group) emulator(400) and the external signal simulation device to perform a software integration test. [Reference numerals] (110) Real-time operation system; (120) Operation software; (130) Monitoring support module; (150) Agent execution module; (160) Buffer; (170) Monitoring communication support module; (170) JTAG port; (200) Communication for software monitoring; (300) External signal simulation device; (400) JTAG emulator
Abstract translation: 目的：提供嵌入式软件验证设备及其操作方法，以通过使用用于监视和验证软件的环境来验证软件功能需求并增加软件的可靠性。 构成：外部信号模拟装置（300）与测试目标装置连接以收发信号，主计算机向外部信号模拟装置输出控制命令。 代理模块（140）接收测试目标设备的监控信息并将其发送到主计算机。 如果在测试目标设备的操作期间发生事件，则监视支持模块（130）向代理模块发送事件信息。 主计算机编写软件测试过程并控制JTAG（联合测试动作组）仿真器（400）和外部信号仿真设备进行软件集成测试。 （附图标记）（110）实时操作系统; （120）操作软件; （130）监控支持模块; （150）代理执行模块; （160）缓冲液 （170）监控通信支持模块; （170）JTAG端口; （200）软件监控通讯; （300）外部信号模拟装置; （400）JTAG仿真器
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公开(公告)号：KR101448013B1
公开(公告)日：2014-10-13
申请号：KR1020140098964
申请日：2014-08-01
Applicant: 국방과학연구소
Abstract: The present invention relates to a multi-computer technique for an aircraft and, more particularly, to a fault-tolerant apparatus in a multi-computer for an aircraft, which is capable of implementing fault determination and channel exclusion logic for sensing an error channel in the multi-computer having a plurality of channels in real time and of sensing a hardware fault or an abnormal operation of equipment and excluding the error channel, through which a hardware fault or an abnormal operation of equipment is sensed by using a hardware circuit, and a method thereof. According to the present invention, for the purpose of fault detection and separation of a multi-computer, the failure of its own channel is determined by using a software monitor, a hardware monitor and a state signal about whether the failure of another channel and a signal for excluding an error channel is generated. Thus, the exact fault diagnosis and the exclusion of the error channel of the multi-computer can be implemented so that the reliability is improved.
Abstract translation: 本发明涉及一种用于飞行器的多计算机技术，更具体地涉及一种用于飞行器的多计算机中的容错装置，其能够实现故障确定和信道排除逻辑，用于感测误差信道 所述多台计算机具有实时的多个通道，并且检测设备的硬件故障或异常操作，并排除通过使用硬件电路来检测设备的硬件故障或异常操作的误差信道，以及 其方法。 根据本发明，为了多计算机的故障检测和分离的目的，通过使用软件监视器，硬件监视器和关于另一信道的故障的状态信号来确定其自身信道的故障 生成用于排除错误信道的信号。 因此，可以实现准确的故障诊断和排除多计算机的误差信道，从而提高可靠性。
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Patent Agency Ranking
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公开(公告)号：KR102092194B1
公开(公告)日：2020-03-23
申请号：KR1020190123911
申请日：2019-10-07
Applicant: 국방과학연구소
IPC: G05B19/042
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公开(公告)号：KR101584717B1
公开(公告)日：2016-01-12
申请号：KR1020150101582
申请日：2015-07-17
Applicant: 국방과학연구소
Abstract: 본발명은항공기용임베디드시스템에관한것으로서, 더상세하게는다양한항공기임베디드시스템에서발생가능한고장모드에대하여고장및 예외상황을감지하고대처하는고장처리모듈의설계를검증하기위한시험방법및 장치에대한것이다.
Abstract translation: 本发明涉及一种用于飞机的嵌入式系统。 更具体地，本发明涉及一种用于验证故障处理模块的产生的检测装置，用于检测和响应可能在各种飞行器嵌入式系统中发生的故障模式的故障和异常情况及其方法。
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公开(公告)号：KR101280287B1
公开(公告)日：2013-07-01
申请号：KR1020110136664
申请日：2011-12-16
Applicant: 국방과학연구소
Abstract: 본 발명의 일 실시예에 따르는 임베디드 소프트웨어 검증장치는, 디스크리트/아날로그 입출력신호 및 시리얼통신신호를 송수신하도록 시험대상장비와 연결되는 외부신호 모의장치와, 상기 외부신호 모의장치로 제어 명령을 출력하는 호스트컴퓨터와, 상기 시험대상장비에 내장되고, 상기 시험대상장비의 모니터링정보를 수신받아 상기 호스트 컴퓨터로 전송하는 에이전트모듈 및 상기 시험대상장비 운용중 이벤트 발생시 이벤트 정보를 메시지형태로 상기 에이전트모듈로 전송하는 모니터링지원모듈을 포함함으로써, 고속 하드웨어에서 구동되는 임베디드 소프트웨어를 실시간으로 모니터링하고 검증할 수 있는 환경을 이용하여 실시간 소프트웨어 요구도를 검증하고 소프트웨어의 신뢰성을 증대시킬 수 있다.
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公开(公告)号：KR101174716B1
公开(公告)日：2012-08-17
申请号：KR1020110036812
申请日：2011-04-20
Applicant: 국방과학연구소
Abstract: PURPOSE: An apparatus and a system for verifying equipment is provided to reliably evaluate target equipment by evaluating equipment based on process data recorded in a process memory. CONSTITUTION: An output data storing unit(110) stores a time tag in output data of target equipment operated by an input signal. A processing data storing unit(120) extracts process data in a processing memory of the target equipment and gives the time tag. An evaluating unit(130) extracts the output and processing data and evaluates the target equipment after comparing reference data.
Abstract translation: 目的：提供一种用于验证设备的装置和系统，用于通过基于记录在处理存储器中的处理数据评估设备来可靠地评估目标设备。 构成：输出数据存储单元（110）将时间标签存储在由输入信号操作的目标设备的输出数据中。 处理数据存储单元（120）提取目标设备的处理存储器中的处理数据并给出时间标签。 评估单元（130）在比较参考数据之后提取输出和处理数据并评估目标设备。
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