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公开(公告)号：KR1020130006799A
公开(公告)日：2013-01-18
申请号：KR1020110061344
申请日：2011-06-23
Applicant: 삼성전기주식회사
Abstract: PURPOSE: A chip type stacked capacitor is provided to reduce danger in mounting failure rate by remarkably reducing an oscillation sound. CONSTITUTION: A chip type stacked capacitor includes a ceramic body(12), first and second outer electrodes, and a band part. The ceramic body includes a dielectric layer(40). The dielectric layer is ten times of a grain average particle diameter. The first and second outer electrodes are formed in a longitudinal direction of the ceramic body. The first and second band parts are extended on an L-W plane of the longitudinal direction. The first and second band parts have respectively different lengths. Third and fourth band parts are extended on an L-T plane of a longitudinal direction. The third and fourth band parts have respectively different lengths.
Abstract translation: 目的：提供一种片式叠层电容器，通过显着降低振荡声，减少安装故障率的危险。 构成：芯片型堆叠电容器包括陶瓷体（12），第一和第二外部电极以及带状部分。 陶瓷体包括电介质层（40）。 电介质层是晶粒平均粒径的十倍。 第一外电极和第二外电极沿陶瓷体的纵向方向形成。 第一和第二带部分在纵向的L-W平面上延伸。 第一和第二带部分分别具有不同的长度。 第三和第四带部分在纵向的L-T平面上延伸。 第三和第四带部分分别具有不同的长度。
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公开(公告)号：KR101548770B1
公开(公告)日：2015-09-01
申请号：KR1020110061344
申请日：2011-06-23
Applicant: 삼성전기주식회사
Abstract: 본발명의일 실시예에따른칩 타입적층커패시터는그레인평균입경의 10배이상이며 3㎛이하의두께로형성되는유전체층을포함하는세라믹바디; 상기세라믹바디의길이방향의양 단부면에형성되는제1 및제2 외부전극; 상기제1 및제2 외부전극에서상기세라믹바디의길이방향내측의 L-W 평면상으로연장형성되며, 서로다른길이를가지는제1 및제2 밴드부; 및상기제1 및제2 외부전극에서상기세라믹바디의길이방향내측의 L-T 평면상으로연장형성되며, 서로다른길이를가지는제3 및제4 밴드부;를포함할수 있다.
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公开(公告)号：KR1020130006800A
公开(公告)日：2013-01-18
申请号：KR1020110061345
申请日：2011-06-23
Applicant: 삼성전기주식회사
CPC classification number: H01G4/1272 , H01G2/065 , H01G4/005 , H01G4/12 , H01G4/228 , H01G4/232 , H01G4/30
Abstract: PURPOSE: A chip type laminated capacitor is provided to supplement complementary power to vibration control force of first to fourth margins formed between an external side of a ceramic body and a capacity forming unit. CONSTITUTION: A chip type laminated capacitor includes a ceramic body, first and second outer electrodes(14,16), and an inner electrode. The ceramic body coats a conductive paste in order to form the inner electrode on a ceramic green sheet. The ceramic body is formed by laminating a plurality of dielectric layers and inner electrodes. The ceramic body consists of a rectangular shape. The inner electrode includes a first inner electrode(22) and a second inner electrode(24).
Abstract translation: 目的：提供一种芯片型叠层电容器，用于补充形成在陶瓷体的外侧和容量形成单元之间的第一至第四边缘的振动控制力的互补功率。 构成：芯片型叠层电容器包括陶瓷体，第一和第二外部电极（14,16）和内部电极。 陶瓷体涂覆导电膏，以便在陶瓷生片上形成内电极。 陶瓷体通过层叠多个电介质层和内部电极而形成。 陶瓷体由矩形构成。 内部电极包括第一内部电极（22）和第二内部电极（24）。
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公开(公告)号：KR101548771B1
公开(公告)日：2015-09-01
申请号：KR1020110061345
申请日：2011-06-23
Applicant: 삼성전기주식회사
CPC classification number: H01G4/1272 , H01G2/065 , H01G4/005 , H01G4/12 , H01G4/228 , H01G4/232 , H01G4/30
Abstract: 본발명의일 실시예에따른칩 타입적층커패시터는그레인평균사이즈의 10배이상이며 3㎛이하의두께로형성되는유전체층이적층되어형성되는세라믹바디; 상기세라믹바디의길이방향의양 단부에형성되며, 다른극성을가지는제1 및제2 외부전극; 일단은상기제2 외부전극이형성되는상기세라믹바디의일 단부면과제1 마진을형성하고, 타단은제1 외부전극으로인출되는제1 내부전극; 및일단은상기제1 외부전극이형성되는상기세라믹바디의타 단부면과제2 마진을형성하고, 타단은제2 외부전극으로인출되는제2 내부전극;을포함하며, 상기제1 마진과제2 마진은 200㎛이하의조건에서서로상이한폭을가질수 있다.
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