公开(公告)号：KR1020030043408A

公开(公告)日：2003-06-02

申请号：KR1020010074571

申请日：2001-11-28

Applicant: 삼성전자주식회사

Inventor： 강동해 ,  오재희

IPC: H01L21/28

Abstract: PURPOSE: A semiconductor device with tungsten a plug cell pad is provided to minimize heat budget on the device during a deposition process and contact resistance between a contact plug and poly cell pad. CONSTITUTION: Gates(210) are formed on a semiconductor substrate(200) and then using them as a mask, active regions are formed. Spacers(220) are formed on the sidewall of gates(210) and an interlayer dielectrics(230) is formed on the resultant structure. The interlayer dielectrics is etched by using a cell pad photoresist, opening the gap between the spacers, as a mask to form an opening, through which ions are implanted on the exposed active region, so that contact ion implementation layer(240) is formed. A barrier metal layer(255) is formed on the resultant surface. A tungsten pad layer(265) is deposited around the temperature of 200 degree C. A planarization process such as CMP or etch-back one is done on the whole structure to form a tungsten cell pad.

Abstract translation: 目的：提供一种具有钨的塞子电池垫的半导体器件，以最小化沉积过程中器件的热量预算以及接触插塞和多晶硅电池焊盘之间的接触电阻。 构成：将栅极（210）形成在半导体衬底（200）上，然后使用它们作为掩模，形成有源区。 隔板（220）形成在栅极（210）的侧壁上，并且在所得结构上形成层间电介质（230）。 通过使用电池衬垫光致抗蚀剂来蚀刻层间电介质，打开间隔件之间的间隙作为掩模以形成开口，通过该开口将离子注入到暴露的有源区上，从而形成接触离子实施层（240）。 在所得表面上形成阻挡金属层（255）。 在200℃的温度附近沉积钨焊盘层（265）。在整个结构上进行诸如CMP或回蚀的平坦化工艺以形成钨电池焊盘。