公开(公告)号：KR1020120135626A

公开(公告)日：2012-12-17

申请号：KR1020110054444

申请日：2011-06-07

Applicant: 삼성전자주식회사

Inventor： 변학균 ,  심종보 ,  이우동 ,  도래형 ,  김부원

IPC: H01L23/48 ,  H01L23/12

CPC classification number: H01L21/784 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/3178 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/03009 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/0362 ,  H01L2224/03622 ,  H01L2224/03903 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0566 ,  H01L2224/06135 ,  H01L2224/08145 ,  H01L2224/08148 ,  H01L2224/08155 ,  H01L2224/27009 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/80815 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/94 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1441 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2224/03 ,  H01L2924/01028 ,  H01L2224/27 ,  H01L2924/00 ,  H01L2224/05552

Abstract: PURPOSE: A method for manufacturing a semiconductor chip package is provided to solder connection patterns by laminating semiconductor chips and to electrically connect the semiconductor chips with the connection patterns, thereby reducing the size of the semiconductor chip package. CONSTITUTION: A semiconductor substrate(10) has a front side and a rear side which is faced with the front side. A chip pad is formed on the front side of the semiconductor substrate. A connection pattern(120) covers a sidewall of the semiconductor substrate. Connection patterns of semiconductor chips(100) are soldered and connect the laminated semiconductor chips. A sidewall part is extended from a first contact part and covers the sidewall of the semiconductor substrate.

Abstract translation: 目的：提供一种制造半导体芯片封装的方法，通过层叠半导体芯片来焊接连接图案，并将半导体芯片与连接图案电连接，从而减小半导体芯片封装的尺寸。 构成：半导体衬底（10）具有面向前侧的前侧和后侧。 在半导体基板的前侧形成有芯片焊盘。 连接图案（120）覆盖半导体衬底的侧壁。 半导体芯片（100）的连接图案被焊接并连接层叠半导体芯片。 侧壁部分从第一接触部分延伸并且覆盖半导体衬底的侧壁。